TI CD4532BNSR

CD4532B consists of combination al logic that encodes the highest priority input (D7.D0) to a 3-bit binary code. The eight inputs, D7 through D0, each have an assigned priority: D7 is the highest priority and Do is the lowest. The priority encoder is inhibited when the chip-enable input EI is low. When E1 is high, the binary representation of the highest-priority input appears on output lines Q2-Q0, and the group select tine GS is high to indicate that priority inputs are present. The enable-out (E0) is high when no priority inputs are present. If any one input is high, E0 is low and al cascaded lower-order stages are disabled. The CD4532B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

• Converts from 1 of 8 to binary
• Provides cascading feature to handle any number of input
• Group select indicates one or more priority inputs
• Standardized, symmetrical output characteristics
• 100% tested for quiescent current at 20 V
• Maximum input current of 1μA at 18 V over full package temperature range; 100 nA at 18 V and 25℃
• Noise margin (full-package-temperature range): 0.5 V at VDD = 5V, 1.5 V at VDD = 10V, 1.5 V at VDD = 15V
• 5-V, 10-V, and 15-V parametric ratings
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOs Devices"

• Priority encoder
• Binary or BCD encoder (keyboard encoding)
• Floating point arithmetic