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TI CD4043BNSR product image
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TI CD4043BNSRRoHS

Manufacturer
MPN
CD4043BNSR
LCSC Part #
C2871929
Packaging
SO-16-208mil
Customer #
Key Attributes
SR Latch 3V~18V 4 150ns SO-16-208mil Latches RoHS
Datasheetpdf iconTI CD4043BNSR
In-Stock: 95
95 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 1.607$ 1.61
10+$ 1.3605$ 13.61
30+$ 1.2065$ 36.20
100+$ 1.0492$ 104.92
500+$ 0.9778$ 488.90
1,000+$ 0.947$ 947.00
Standard Packaging2000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Latches
ManufacturerTI
PackagingSO-16-208mil
Logic TypeSR Latch
Quiescent Current0.02uA
Voltage - Supply3V~18V
Current - Output Low(IOL)0.64mA
Output TypeTri-State
Operating Temperature-55℃~+125℃
Current - Output High(IOH)1mA
Number of Channels4
Propagation Delay150ns

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2000
Sales UnitPiece

Introduction

AI Translation

CD4043B types are quad crosscoupled 3-state CMOS NOR latches and the CD4044B types are quad cross-coupled 3- state CMOS NAND latches. Each latch has a separate Q output and individual SET and RESET inputs. The Q outputs are controlled by a common ENABLE input. A logic "1" or high on the ENABLE input connects the latch.states to the Q outputs. A logic "0" or low on the ENABLE input disconnects the latch states from the Q outputs, resulting in an open circuit condition on the Q outputs. The ppen circuit feature allows common busing of the outputs.

Features

AI Translation
  • 3-state outputs with common output ENABLE
  • Separate SET and RESET inputs for each latch
  • NOR and NAND configurations
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized symmetrical output characteristics
  • 100% tested for quiescent current at 20V
  • Maximum input current of μA at 78V over full package temperature range; 100 nA at 18 V and 25℃
  • Noise margin (over full package temperature range): 1 V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V
  • Meets all requirements of JEDEC Tentative Standard No. 1aB, "Standard Specifications for Description of B' Series CMOS Devices"
  • Holding register in multi-register system
  • Four bits of independent storage with output ENABLE
  • Strobed register
  • General digital logic
  • CD4643B for positive logic systems
  • CD4044B for negative logic systems