TI CD74ACT373M96
| Manufacturer | |
| MPN | CD74ACT373M96 |
| LCSC Part # | C2870753 |
| Packaging | SOIC-20-300mil |
| Customer # | |
| Key Attributes | Octal Transparent Latch, 3-State |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | TI | |
| Packaging | SOIC-20-300mil | |
| Series | 74ACT | |
| Quiescent Current | 8uA | |
| Logic Type | D Latch | |
| Voltage - Supply | 4.5V~5.5V | |
| Output Type | Tri-State | |
| Operating Temperature | -55℃~+125℃ | |
| Number of Channels | 8 | |
| Setup Time | 2ns | |
| Hold Time | 3ns | |
| Propagation Delay | 10.4ns |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
CD54/74AC/ACT373 is non-inverting; CD54/74AC/ACT533 is inverting. These octal transparent three-state latches are fabricated using advanced CMOS technology. When Latch Enable (LE) is HIGH, the outputs are transparent to the inputs. When Latch Enable (LE) goes LOW, data is latched. Output Enable (OE) controls the three-state outputs. When Output Enable (OE) is HIGH, the outputs are in a high-impedance state. Latch operation is independent of the Output Enable state. CD74AC/ACT373 and CD74AC/ACT533 are available in 20-pin DIP plastic packages (E suffix) and 20-pin small outline plastic packages (M suffix). Both package types operate over the following temperature ranges: commercial (0 to 70℃); industrial (-40 to +85℃); extended industrial (-55 to +125℃). CD54AC/ACT373 and CD54AC/ACT533 are available in die form (H suffix) and operate over a temperature range of -55 to +125℃.
Features
- Buffered inputs
- Typical propagation delay: 4.3 ns @ Vcc = 5V, TA = 25℃, CL = 50 pF
- Exceeds 2-kV ESD Protection - MIL-STD-883, Method 3015
- SCR-Latchup-resistant CMOS process and circuit design
- Speed of bipolar FAST-/AS/S with significantly reduced power consumption
- Balanced propagation delays
- AC types feature 1.5 to 5.5V operation and balanced noise immunity at 30% of the supply
- ± 24-mA output drive current - Fanout to 15 FAST ICs - Drives 50-ohm transmission lines
Applications
- High-speed data transmission
- 50-ohm transmission line drive
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 0.7119 | $ 0.71 |
| 10+ | $ 0.6945 | $ 6.95 |
| 30+ | $ 0.6819 | $ 20.46 |
| 100+ | $ 0.6692 | $ 66.92 |
Standard Packaging2000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | TI | |
| Packaging | SOIC-20-300mil | |
| Series | 74ACT | |
| Quiescent Current | 8uA | |
| Logic Type | D Latch | |
| Voltage - Supply | 4.5V~5.5V | |
| Output Type | Tri-State | |
| Operating Temperature | -55℃~+125℃ | |
| Number of Channels | 8 | |
| Setup Time | 2ns | |
| Hold Time | 3ns | |
| Propagation Delay | 10.4ns |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
CD54/74AC/ACT373 is non-inverting; CD54/74AC/ACT533 is inverting. These octal transparent three-state latches are fabricated using advanced CMOS technology. When Latch Enable (LE) is HIGH, the outputs are transparent to the inputs. When Latch Enable (LE) goes LOW, data is latched. Output Enable (OE) controls the three-state outputs. When Output Enable (OE) is HIGH, the outputs are in a high-impedance state. Latch operation is independent of the Output Enable state. CD74AC/ACT373 and CD74AC/ACT533 are available in 20-pin DIP plastic packages (E suffix) and 20-pin small outline plastic packages (M suffix). Both package types operate over the following temperature ranges: commercial (0 to 70℃); industrial (-40 to +85℃); extended industrial (-55 to +125℃). CD54AC/ACT373 and CD54AC/ACT533 are available in die form (H suffix) and operate over a temperature range of -55 to +125℃.
Features
- Buffered inputs
- Typical propagation delay: 4.3 ns @ Vcc = 5V, TA = 25℃, CL = 50 pF
- Exceeds 2-kV ESD Protection - MIL-STD-883, Method 3015
- SCR-Latchup-resistant CMOS process and circuit design
- Speed of bipolar FAST-/AS/S with significantly reduced power consumption
- Balanced propagation delays
- AC types feature 1.5 to 5.5V operation and balanced noise immunity at 30% of the supply
- ± 24-mA output drive current - Fanout to 15 FAST ICs - Drives 50-ohm transmission lines
Applications
- High-speed data transmission
- 50-ohm transmission line drive
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



