TI SN74ABTR2245PWR
| Manufacturer | |
| MPN | SN74ABTR2245PWR |
| LCSC Part # | C2869347 |
| Packaging | TSSOP-20 |
| Customer # | |
| Key Attributes | OCTAL TRANSCEIVERS AND LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS |
| Datasheet |  TI SN74ABTR2245PWR |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | TI | |
| Packaging | TSSOP-20 | |
| Input type | - | |
| Voltage - Supply | 4.5V~5.5V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | 12mA | |
| Series | 74ABTR | |
| Operating Temperature | -40℃~+85℃ | |
| Current - Output Low(IOL) | 12mA | |
| Number of Bits per Element | 8 | |
| Channel Type | Bidirectional | |
| Features | Power-off isolation;Output enable | |
| Number of Elements | 1 | |
| Quiescent Current | - | |
| Propagation Delay | - |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
These octal transceivers and line drivers are designed for asynchronous communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE(overline)) input can be used to disable the device so the buses are effectively isolated.
Both the A-port and B-port outputs, which are designed to sink up to 12 mA, include equivalent 25-Ω series resistors to reduce overshoot and undershoot.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OC(overline) should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Features
- Outputs Have Equivalent 25-Ω Series Resistors, So No External Resistors Are Required
- State-of-the-Art EPIC-IIB BiCMOS Design Significantly Reduces Power Dissipation
- High-Impedance State During Power Up and Power Down
- Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
- ESD Protection Exceeds 2000 V Per MIL-STD-833, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Typical vOLP (Output Ground Bounce) < 1 V at Vcc = 5 V, TA = 25℃
- Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and Thin Very Small-Outline (DGV) Packages, Ceramic Chip Carriers (FK), and Plastic (N) and Ceramic (J) DIPs
Applications
- Data transfer between asynchronous communication data buses
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 0.874 | $ 0.87 |
| 10+ | $ 0.8546 | $ 8.55 |
| 30+ | $ 0.8416 | $ 25.25 |
| 100+ | $ 0.8286 | $ 82.86 |
Standard Packaging2000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | TI | |
| Packaging | TSSOP-20 | |
| Input type | - | |
| Voltage - Supply | 4.5V~5.5V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | 12mA | |
| Series | 74ABTR | |
| Operating Temperature | -40℃~+85℃ | |
| Current - Output Low(IOL) | 12mA | |
| Number of Bits per Element | 8 | |
| Channel Type | Bidirectional | |
| Features | Power-off isolation;Output enable | |
| Number of Elements | 1 | |
| Quiescent Current | - | |
| Propagation Delay | - |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
These octal transceivers and line drivers are designed for asynchronous communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE(overline)) input can be used to disable the device so the buses are effectively isolated.
Both the A-port and B-port outputs, which are designed to sink up to 12 mA, include equivalent 25-Ω series resistors to reduce overshoot and undershoot.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OC(overline) should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Features
- Outputs Have Equivalent 25-Ω Series Resistors, So No External Resistors Are Required
- State-of-the-Art EPIC-IIB BiCMOS Design Significantly Reduces Power Dissipation
- High-Impedance State During Power Up and Power Down
- Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
- ESD Protection Exceeds 2000 V Per MIL-STD-833, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Typical vOLP (Output Ground Bounce) < 1 V at Vcc = 5 V, TA = 25℃
- Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and Thin Very Small-Outline (DGV) Packages, Ceramic Chip Carriers (FK), and Plastic (N) and Ceramic (J) DIPs
Applications
- Data transfer between asynchronous communication data buses
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |