TI LMK1C1108PWR

High-performance 1:6 and 1:8 LVCMOS clock buffers

• Extremely low output skew, < 55ps
• Extremely low added jitter, nominal value < 25fs
  • Typical value is 12fs at VDD = 3.3V
  • Typical value is 15fs at VDD = 2.5V
  • Typical value is 28fs at VDD = 1.8V
• Extremely low propagation delay, < 3ns
• Synchronous output enable

Power supply voltage: 3.3V, 2.5V or 1.8V

• Inputs tolerate 3.3V across the supply voltage range
• Fail-safe inputs
• Industrial high ESD rating of 9000V HBM

fmax = 250MHz (3.3V) Δfmax = 200MHz (2.5V and 1.8V) Operating temperature range: -40°C to 125°C

Available in 14-pin and 16-pin TSSOP packages Offer five different fan-out options: 1:2, 1:3, 1:4, 1:6 and 1:8. All devices in this series are pin-compatible with each other and backward-compatible with the CDCLVC110x series, making them easy to handle. All devices in this series have the same high-performance characteristics, such as low added jitter, low skew and wide operating temperature range.

Feature a synchronous output enable control terminal (1G), which can switch the outputs to a low-level state when 1G is at a low level. These devices have fail-safe inputs, which prevent the outputs from oscillating in the absence of an input signal and allow the input signal to be applied before VDD is supplied. They can operate at 1.8V, 2.5V and 3.3V, with a rated operating temperature range of -40°C to 125°C.

• High-performance 1:6 and 1:8 LVCMOS clock buffers
• Ultra-low output skew, < 55ps
• Ultra-low additive jitter, typical < 25fs
• Typical 12fs at VDD = 3.3V
• Typical 15fs at VDD = 2.5V
• Typical 28fs at VDD = 1.8V
• Ultra-low propagation delay, <3ns
• Synchronous output enable
• Supply voltage: 3.3V, 2.5V, or 1.8V
• 3.3V-tolerant inputs across supply voltage range
• Failsafe inputs
• Industrial-grade high ESD rating: 9000V HBM
• fmax = 250MHz (3.3V)
• Δfmax = 200MHz (2.5V and 1.8V)
• Operating temperature range: -40°C to 125°C
• Available in 14-pin and 16-pin TSSOP packages
• Five fanout options: 1:2, 1:3, 1:4, 1:6, and 1:8
• All devices are pin-compatible with each other and backward-compatible with the CDCLVC110x family
• Synchronous output enable control (1G) drives outputs low when 1G is asserted low
• Failsafe inputs prevent output oscillation in the absence of an input signal and allow the input signal to be applied before VDD is supplied

• Factory Automation & Control
• Telecom Equipment
• Data Center & Enterprise Computing
• Grid Infrastructure
• Motor Drives
• Medical Imaging