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TI CD74HC7046AM96RoHS

Manufacturer
TI
MPN
CD74HC7046AM96
LCSC Part #
C2866232
Packaging
SOIC-16
Customer #
Key Attributes
38MHz 2V~6V CMOS 2 SOIC-16 Clock Generators, PLLs, Frequency Synthesizers RoHS
Datasheetpdf iconTI CD74HC7046AM96
In-Stock: 54
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QtyUnit PriceTotal Amount
1+$ 4.7778$ 4.78
10+$ 4.269$ 42.69
30+$ 3.9422$ 118.27
100+$ 3.6285$ 362.85
Standard Packaging2500/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers
ManufacturerTI
PackagingSOIC-16
Operating Temperature-55℃~+125℃
Clock/OscillatorBuilt-in
Output Frequency(Max)38MHz
Voltage - Supply2V~6V
Period Jitter, Peak-to-Peak-;-
Phase OffsetNot supported
Features-
Output LevelCMOS
Phase Jitter-
Number of Outputs2
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

The CD74HC7046A and CD74HCT7046A high-speed silicon-gate CMOS devices, specified in compliance with JEDEC Standard No. 7A, are phase-locked-loop (PLL) circuits that contain a linear voltage-controlled oscillator (VCO), two-phase comparators (PC1, PC2), and a lock detector. A signal input and a comparator input are common to each comparator. The lock detector gives a HIGH level at pin 1 (LD) when the PLL is locked. The lock detector capacitor must be connected between pin 15 (C_LD) and pin 8 (Gnd). For a frequency range of 100kHz to 10MHz, the lock detector capacitor should be 1000pF to 10pF, respectively. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 7046A forms a secondorder loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.

Features

AI Translation
  • Center Frequency of 18MHz (Typ) at V_CC = 5V, Minimum Center Frequency of 12MHz at V_CC = 4.5V
  • Choice of Two Phase Comparators - Exclusive-OR - Edge-Triggered JK Flip-Flop
  • Excellent VCO Frequency Linearity
  • VCO-Inhibit Control for ON/OFF Keying and for Low Standby Power Consumption
  • Minimal Frequency Drift
  • Zero Voltage Offset Due to Op-Amp Buffer
  • Operating Power-Supply Voltage Range - VCO Section: 3V to 6V - Digital Section: 2V to 6V
  • Fanout (Over Temperature Range) - Standard Outputs: 10 LSTTL Loads - Bus Driver Outputs: 15 LSTTL Loads
  • Wide Operating Temperature Range: -55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types - 2V to 6V Operation - High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V
  • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, V_IL = 0.8V (Max), V_IH = 2V (Min) - CMOS Input Compatibility, I ≤ 1μA at V_OL, V_OH

Applications

AI Translation
  • FM Modulation and Demodulation
  • Frequency Synthesis and Multiplication
  • Frequency Discrimination
  • Tone Decoding
  • Data Synchronization and Conditioning
  • Voltage-to-Frequency Conversion
  • Motor-Speed Control