TI SN74LVC1G02MDCKREP
| Manufacturer | |
| MPN | SN74LVC1G02MDCKREP |
| LCSC Part # | C2861737 |
| Packaging | SC-70-5 |
| Customer # | |
| Key Attributes | SINGLE 2-INPUT POSITIVE-NOR GATE |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | TI | |
| Packaging | SC-70-5 | |
| Features | Local shutdown mode | |
| Input Logic Level - Low | - | |
| Logic Family | 74LVC Series | |
| Operating Temperature | -55℃~+125℃ | |
| Input Logic Level - High | 1.7V~2V | |
| Output Logic Level - High | 1.2V;1.9V;2.4V;3.8V | |
| Quiescent Current(Iq) | 10uA | |
| Voltage - Supply | 1.65V~5.5V | |
| Number of Channels | 1;2 | |
| Current - Output High(IOH) | 32mA | |
| Output Logic Level - Low | 450mV;300mV;550mV;600mV | |
| Propagation Delay | 5ns@5V,50pF | |
| Current - Output Low(IOL) | 32mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
This single 2-input positive-NOR gate is designed for 1.65-V to 5.5-V CC operation. The SN74LVC1G02 performs the Boolean function Y = A(overline) + B(overline) or Y = A(overline) x B(overline) in positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Features
- Controlled Baseline – One Assembly – One Test Site – One Fabrication Site
- Extended Temperature Performance of -55℃ to 125℃
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Available in the Texas Instruments NanoStar and NanoFree Packages
- Supports 5-V Vcc Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 3.6 ns at 3.3 V
- Low Power Consumption, 10-µA Max ICC
- ±24-mA Output Drive at 3.3 V
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 2.2257 | $ 2.23 |
| 10+ | $ 1.889 | $ 18.89 |
| 30+ | $ 1.6784 | $ 50.35 |
| 100+ | $ 1.4615 | $ 146.15 |
| 500+ | $ 1.3641 | $ 682.05 |
| 1,000+ | $ 1.3227 | $ 1322.70 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | TI | |
| Packaging | SC-70-5 | |
| Features | Local shutdown mode | |
| Input Logic Level - Low | - | |
| Logic Family | 74LVC Series | |
| Operating Temperature | -55℃~+125℃ | |
| Input Logic Level - High | 1.7V~2V | |
| Output Logic Level - High | 1.2V;1.9V;2.4V;3.8V | |
| Quiescent Current(Iq) | 10uA | |
| Voltage - Supply | 1.65V~5.5V | |
| Number of Channels | 1;2 | |
| Current - Output High(IOH) | 32mA | |
| Output Logic Level - Low | 450mV;300mV;550mV;600mV | |
| Propagation Delay | 5ns@5V,50pF | |
| Current - Output Low(IOL) | 32mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
This single 2-input positive-NOR gate is designed for 1.65-V to 5.5-V CC operation. The SN74LVC1G02 performs the Boolean function Y = A(overline) + B(overline) or Y = A(overline) x B(overline) in positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Features
- Controlled Baseline – One Assembly – One Test Site – One Fabrication Site
- Extended Temperature Performance of -55℃ to 125℃
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Available in the Texas Instruments NanoStar and NanoFree Packages
- Supports 5-V Vcc Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 3.6 ns at 3.3 V
- Low Power Consumption, 10-µA Max ICC
- ±24-mA Output Drive at 3.3 V
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



