TI SN74AUC2G86YZPR
| Manufacturer | |
| MPN | SN74AUC2G86YZPR |
| LCSC Part # | C2860531 |
| Packaging | DSBGA-8 |
| Customer # | |
| Key Attributes | DUAL 2-INPUT EXCLUSIVE-OR GATE |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | TI | |
| Packaging | DSBGA-8 | |
| Logic Family | 74AUC Series | |
| Voltage - Supply | 800mV~2.7V | |
| Output Logic Level - Low | 250mV;300mV;400mV;450mV;600mV | |
| Propagation Delay | 1.7ns@1.8V | |
| Features | Overvoltage-tolerant input;Local shutdown mode | |
| Input Logic Level - High | 1.7V | |
| Operating Temperature | -40℃~+85℃ | |
| Input Logic Level - Low | 0V~700mV | |
| Output Logic Level - High | 550mV;800mV;1V;1.2V;1.8V | |
| Quiescent Current(Iq) | 10uA | |
| Number of Channels | 2;2 | |
| Current - Output High(IOH) | 9mA | |
| Current - Output Low(IOL) | 9mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
This dual 2-input exclusive-OR gate is operational at 0.8–V to 2.7–VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUC2G86 performs the Boolean function Y = A⊕B or Y = ĀB + A B̄ in positive logic. A common application is as a true/complement element. If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Features
- Available in the Texas Instruments NanoFree™ Package
- Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- Ioff Supports Partial-Power-Down Mode Operation
- Sub-1-V Operable
- Max tpd of 1.7 ns at 1.8 V
- Low Power Consumption, 10-μA Max ICC
- ±8-mA Output Drive at 1.8 V
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22: 2000-V Human-Body Model (A114-A), 200-V Machine Model (A115-A), 1000-V Charged-Device Model (C101)
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 0.7324 | $ 0.73 |
| 10+ | $ 0.7147 | $ 7.15 |
| 30+ | $ 0.7018 | $ 21.05 |
| 100+ | $ 0.6905 | $ 69.05 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | TI | |
| Packaging | DSBGA-8 | |
| Logic Family | 74AUC Series | |
| Voltage - Supply | 800mV~2.7V | |
| Output Logic Level - Low | 250mV;300mV;400mV;450mV;600mV | |
| Propagation Delay | 1.7ns@1.8V | |
| Features | Overvoltage-tolerant input;Local shutdown mode | |
| Input Logic Level - High | 1.7V | |
| Operating Temperature | -40℃~+85℃ | |
| Input Logic Level - Low | 0V~700mV | |
| Output Logic Level - High | 550mV;800mV;1V;1.2V;1.8V | |
| Quiescent Current(Iq) | 10uA | |
| Number of Channels | 2;2 | |
| Current - Output High(IOH) | 9mA | |
| Current - Output Low(IOL) | 9mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
This dual 2-input exclusive-OR gate is operational at 0.8–V to 2.7–VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUC2G86 performs the Boolean function Y = A⊕B or Y = ĀB + A B̄ in positive logic. A common application is as a true/complement element. If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Features
- Available in the Texas Instruments NanoFree™ Package
- Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- Ioff Supports Partial-Power-Down Mode Operation
- Sub-1-V Operable
- Max tpd of 1.7 ns at 1.8 V
- Low Power Consumption, 10-μA Max ICC
- ±8-mA Output Drive at 1.8 V
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22: 2000-V Human-Body Model (A114-A), 200-V Machine Model (A115-A), 1000-V Charged-Device Model (C101)
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

