WCH CH424Q

CH424 is a FIFO memory chip with capacity of 4, 000 bytes. CH424 has two 8-bit passive parallel ports: input port W and output port R. CH424 is hooked to the system bus of DSP/MCU/MPU and other controllers through 8-bit data lines as well as read, write and chip selection control lines. It is suitable for connecting MCU to MCU, MCU to DSP/MCU, etc.

• 4K x 8-bit FIFO
• 8-bit parallel interface:
  • Port W/entry: 8-bit bidirectional three-state data bus (WD7 - WD0), chip selection (W_CS), write (W_WR), read (W_RD)
  • Port R/exit: 8-bit three-state data bus (RD7 - RD0), chip selection (R_CS), read (R_RD), address (R_A0)
• Query the number of bytes of FIFO used space and free space at any time, being easy to read and write in blocks
• Provide FIFO full state line FULL and FIFO empty state line EMPT, active at low level
• Support supply voltages of 5V, 3.3V and 3V
• Adopt QFP-44 lead-free package, and be compatible with RoHS