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Nexperia 74LVC125ABQ,115
| Manufacturer | |
| MPN | 74LVC125ABQ,115 |
| LCSC Part # | C282343 |
| Packaging | DHVQFN-14-EP(2.5x3) |
| Customer # | |
| Key Attributes | Quad buffer/line driver with 5 V tolerant input/outputs; 3-state |
| Datasheet |  Nexperia 74LVC125ABQ,115 |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | Nexperia | |
| Packaging | DHVQFN-14-EP(2.5x3) | |
| Input type | Schmitt trigger | |
| Voltage - Supply | 1.65V~3.6V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | 24mA | |
| Series | 74LVC | |
| Operating Temperature | -40℃~+125℃ | |
| Current - Output Low(IOL) | 24mA | |
| Number of Bits per Element | 1 | |
| Channel Type | Unidirectional | |
| Features | Output enable;Power-off isolation;Level shifting | |
| Number of Elements | 4 | |
| Propagation Delay | 2.5ns@3.3V,50pF | |
| Quiescent Current | 40uA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC125A is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features
- Overvoltage tolerant inputs to 5.5 V
- Wide supply voltage range from 1.2 V to 3.6 V
- CMOS low power consumption
- Direct interface with TTL levels
- Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V)
- JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V)
- IOFF circuitry provides partial Power-down mode operation
- ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃
Applications
- Level translator for mixed 3.3V and 5V environments
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.2218 | $ 1.11 |
| 50+ | $ 0.1758 | $ 8.79 |
| 150+ | $ 0.1561 | $ 23.42 |
| 500+ | $ 0.1315 | $ 65.75 |
| 3,000+ | $ 0.1206 | $ 361.80 |
| 6,000+ | $ 0.114 | $ 684.00 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | Nexperia | |
| Packaging | DHVQFN-14-EP(2.5x3) | |
| Input type | Schmitt trigger | |
| Voltage - Supply | 1.65V~3.6V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | 24mA | |
| Series | 74LVC | |
| Operating Temperature | -40℃~+125℃ | |
| Current - Output Low(IOL) | 24mA | |
| Number of Bits per Element | 1 | |
| Channel Type | Unidirectional | |
| Features | Output enable;Power-off isolation;Level shifting | |
| Number of Elements | 4 | |
| Propagation Delay | 2.5ns@3.3V,50pF | |
| Quiescent Current | 40uA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74LVC125A is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features
- Overvoltage tolerant inputs to 5.5 V
- Wide supply voltage range from 1.2 V to 3.6 V
- CMOS low power consumption
- Direct interface with TTL levels
- Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V)
- JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V)
- IOFF circuitry provides partial Power-down mode operation
- ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃
Applications
- Level translator for mixed 3.3V and 5V environments
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |