GR CD4015NS16ARDQ

CD4015 consists of two identical, independent, 4 - stage serial - input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from each of the four stages on both registers. All register stages are D - type, master - slave flip - flops. The logic level present at the DATA input is transferred into the first register stage and shifted over one stage at each positivegoing clock transition. Resetting of all stages is accomplished by a high level on the reset line. Register expansion to 8 stages using one CD4015 package, or to more than 8 stages using additional CD4015’s is possible. All inputs are protected against static discharge with diodes to VDD and VSS.

• Fully static operation
• 8 Master - Slave flip - flops plus input and output buffering
• 100% tested for quiescent current at 18V
• Standardized symmetrical output characteristics
• Maximum input current of 1μA at 18V and 25℃
• 5V, 10V, and 15V parametric ratings