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TI SN74AVC1T45YZPRRoHS

Manufacturer
MPN
SN74AVC1T45YZPR
LCSC Part #
C2677361
Packaging
DSBGA-6(0.9x1.4)
Customer #
Key Attributes
Single-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs
Datasheetpdf iconTI SN74AVC1T45YZPR
In-Stock: 109
109 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 0.5609$ 0.56
10+$ 0.4402$ 4.40
30+$ 0.3881$ 11.64
100+$ 0.3245$ 32.45
500+$ 0.2805$ 140.25
1,000+$ 0.2625$ 262.50
Standard Packaging3000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Translators, Level Shifters
ManufacturerTI
PackagingDSBGA-6(0.9x1.4)
output typeTri-State
Output Signal-
Input Signal-
Operating Temperature-40℃~+85℃
Data Rate500Mbps
Number of Elements1
Channel TypeBidirectional
FeaturesPower-off protection;Output enable high-impedance
Voltage - Supply1.2V~3.6V;1.2V~3.6V
Number of Circuits1

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging3000
Sales UnitPiece

Introduction

AI Translation

This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. It is optimized to operate with VCC A/VCC B set at 1.4 V to 3.6 V. It is operational with VCC A/VCC B as low as 1.2 V. The A port is designed to track VCC A. VCC A accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCC B. VCC B accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage, bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVC1T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICC Z.

The SN74AVC1T45 is designed so that the DIR input is powered by VCC A.

This device is fully specified for partial-power-down applications using I₀H. The I₀₋ₚ circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance state.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

Features

AI Translation
  • Available in the NanoFree™ Package
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V Power-Supply Range
  • VCC Isolation Feature - If Either VCC Input Is At GND, Both Ports Are In The High-Impedance State
  • DIR Input Circuit Referenced to VCC A
  • ±12-mA Output Drive at 3.3 V
  • I/Os Are 4.6-V Tolerant
  • Supports Partial-Power-Down Mode Operation
  • Typical Max Data Rates:
    • 500 Mbps (1.8-V to 3.3-V Translation)
    • 320 Mbps (<1.8-V to 3.3-V Translation)
    • 320 Mbps (Translate to 2.5 V or 1.8 V)
    • 280 Mbps (Translate to 1.5 V)
    • 240 Mbps (Translate to 1.2 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22:
    • ±2000-V Human Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • ±1000-V Charged-Device Model (C101)

Applications

AI Translation
  • Personal Electronic
  • Industrial
  • Enterprise
  • Telecom