TI SN74LV125ATRGYR
| Manufacturer | |
| MPN | SN74LV125ATRGYR |
| LCSC Part # | C2675645 |
| Packaging | VQFN-14-EP(3.5x3.5) |
| Customer # | |
| Key Attributes | Quadruple Bus Buffer Gate with 3-State Outputs |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | TI | |
| Packaging | VQFN-14-EP(3.5x3.5) | |
| Input type | - | |
| Voltage - Supply | 4.5V~5.5V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | 16mA | |
| Series | 74LV | |
| Operating Temperature | -40℃~+85℃ | |
| Current - Output Low(IOL) | 16mA | |
| Number of Bits per Element | 1 | |
| Channel Type | Unidirectional | |
| Features | Output enable;Power-off isolation | |
| Number of Elements | 4 | |
| Propagation Delay | 5.3ns@5V,50pF | |
| Quiescent Current | 20uA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The SN74LV125AT is a quadruple bus buffer gate. This device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE(overline)) input is high.
To ensure the high-impedance state during power up or power down, OE(right arrow) should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Features
- Inputs Are TTL-Voltage Compatible
- 4.5-V to 5.5-V Vcc Operation
- Typical tpd of 3.8 ns at 5 V
- Typical VoLP (Output Ground Bounce) < 0.8 V at VCC = 50, TA = 25℃
- Typical VoHV (Output VoH Undershoot) > 2.3 V at Vcc = 5 V, TA = 25℃
- Support Mixed-Mode Voltage Operation on All Ports
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.1442 | $ 0.72 |
| 50+ | $ 0.1408 | $ 7.04 |
| 150+ | $ 0.1385 | $ 20.78 |
| 500+ | $ 0.1363 | $ 68.15 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | TI | |
| Packaging | VQFN-14-EP(3.5x3.5) | |
| Input type | - | |
| Voltage - Supply | 4.5V~5.5V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | 16mA | |
| Series | 74LV | |
| Operating Temperature | -40℃~+85℃ | |
| Current - Output Low(IOL) | 16mA | |
| Number of Bits per Element | 1 | |
| Channel Type | Unidirectional | |
| Features | Output enable;Power-off isolation | |
| Number of Elements | 4 | |
| Propagation Delay | 5.3ns@5V,50pF | |
| Quiescent Current | 20uA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The SN74LV125AT is a quadruple bus buffer gate. This device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE(overline)) input is high.
To ensure the high-impedance state during power up or power down, OE(right arrow) should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Features
- Inputs Are TTL-Voltage Compatible
- 4.5-V to 5.5-V Vcc Operation
- Typical tpd of 3.8 ns at 5 V
- Typical VoLP (Output Ground Bounce) < 0.8 V at VCC = 50, TA = 25℃
- Typical VoHV (Output VoH Undershoot) > 2.3 V at Vcc = 5 V, TA = 25℃
- Support Mixed-Mode Voltage Operation on All Ports
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

