TI SN74LVC112APWR

Manufacturer	TI
MPN	SN74LVC112APWR
LCSC Part #	C2652828
Packaging	TSSOP-16
Customer #
Key Attributes	Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset
Datasheet	TI SN74LVC112APWR

Products Specifications

Type	Description	All
Category	Integrated Circuits (ICs)/Logic/Flip Flops
Manufacturer	TI
Packaging	TSSOP-16
Voltage - Supply	1.65V~3.6V
Number of Bits per Element	1
Output Type	Complementary type
Operating Temperature	-40℃~+85℃
Series	74LVC Series
Synchronous/Asynchronous	Asynchronous
Number of Elements	2
Current - Output High(IOH)	24mA
Current - Output Low(IOL)	24mA
Setup Time	2.3ns
Quiescent Current	10uA
Hold Time	700ps
Propagation Delay	5.9ns@3.3V,50pF
Trigger Type	Falling Edge

AI Translation

This dual negative-edge-triggered J-K flip-flop is designed for 1.65-V to 3.6-V VCC operation.

AI Translation

Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max tpd of 4.8 ns at 3.3 V
Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25℃
Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25℃
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
- 3000-V Human-Body Model
- 200-V Machine Model
- 1500-V Charged-Device Model

AI Translation

In-Stock: 554

554 In stock, ships now

Add to BOM List

Qty	Unit Price	Total Amount
1+	$ 0.6503	$ 0.65
10+	$ 0.5303	$ 5.30
30+	$ 0.4703	$ 14.11
100+	$ 0.4103	$ 41.03
500+	$ 0.3746	$ 187.30
1,000+	$ 0.3568	$ 356.80
Standard Packaging2000/Full Reel

Better price for more quantity?