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TI CD74HC4538NSR product image
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TI CD74HC4538NSRRoHS

Manufacturer
MPN
CD74HC4538NSR
LCSC Part #
C2652500
Packaging
SO-16-208mil
Customer #
Key Attributes
High-Speed CMOS Logic Dual Retriggerable Precision Monostable Multivibrator
Datasheetpdf iconTI CD74HC4538NSR
In-Stock: 39
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QtyUnit PriceTotal Amount
1+$ 0.5453$ 0.55
10+$ 0.5339$ 5.34
30+$ 0.5257$ 15.77
100+$ 0.5176$ 51.76
Standard Packaging2000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Multivibrators
ManufacturerTI
PackagingSO-16-208mil
Input TypeSchmitt trigger
Logic TypeMonostable
Number Of Channels2

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2000
Sales UnitPiece

Introduction

AI Translation

The ’HC4538 and ’HCT4538 are dual retriggerable/resettable monostable precision multivibrators for fixed voltage timing applications. An external resistor (Rx) and an external capacitor (Cx) control the timing and the accuracy for the circuit. Adjustment of Rx and Cx provides a wide range of output pulse widths from the Q and Q(overline) terminals. The propagation delay from trigger input-to-output transition and the propagation delay from reset input-to-output transition are independent of Rx and Cx.

Leading-edge triggering (A) and trailing edge triggering (B) inputs are provided for triggering from either edge of the input pulse. An unused “A” input should be tied to GND and an unused B(overline) should be tied to Vcc. On power up the IC is reset. Unused resets and sections must be terminated. In normal operation the circuit retriggers on the application of each new trigger pulse. To operate in the non-triggerable mode Q(overline) is connected to B(overline) when leading edge triggering (A) is used or Q is connected to A when trailing edge triggering (B(overline)) is used. The period (τ) can be calculated from τ = (0.7) Rx, Cx; RMIN is 5kΩ. CMIN is 0pF.

Features

AI Translation
  • Retriggerable/Resettable Capability
  • Trigger and Reset Propagation Delays Independent of Rx, Cx
  • Triggering from the Leading or Trailing Edge
  • Q and Q(overline) Buffered Outputs Available
  • Separate Resets
  • Wide Range of Output Pulse Widths
  • Schmitt Trigger Input on A and B Inputs
  • Retrigger Time is Independent of Cx
  • Fanout (Over Temperature Range) - Standard Outputs: 10 LSTTL Loads - Bus Driver Outputs: 15 LSTTL Loads
  • Wide Operating Temperature Range: -55℃ to 125℃
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of Vcc at Vcc = 5V
  • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, II ≤ 1μA at VOL, VOH