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TI SN74LVTH244APWRRoHS

Manufacturer
MPN
SN74LVTH244APWR
LCSC Part #
C2652118
Packaging
TSSOP-20
Customer #
Key Attributes
3.3-V Octal Buffers/Drivers with 3-State Outputs
Datasheetpdf iconTI SN74LVTH244APWR
In-Stock: 637
637 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
1+$ 0.6053$ 0.61
10+$ 0.516$ 5.16
30+$ 0.4528$ 13.58
100+$ 0.4008$ 40.08
500+$ 0.3846$ 192.30
1,000+$ 0.3733$ 373.30
Standard Packaging2000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers
ManufacturerTI
PackagingTSSOP-20
Input type-
Voltage - Supply2.7V~3.6V
Output TypeTri-State
Current - Output High(IOH)32mA
Series74LVTH
Operating Temperature-40℃~+85℃
Current - Output Low(IOL)64mA
Number of Bits per Element4
Channel TypeUnidirectional
FeaturesPower-off isolation;Hot-swap support;Bus hold;Output enable
Number of Elements2
Propagation Delay2.3ns@3.3V,50pF
Quiescent Current190uA

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2000
Sales UnitPiece

Introduction

AI Translation

These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. The 'LVTH244A devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, the devices pass data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

Features

AI Translation
  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V Vcc)
  • Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25℃
  • Support Unregulated Battery Operation Down to 2.7V
  • Ioff and Power-Up 3-State
  • Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • ESD Protection Exceeds JESD 22: 2000-V Human-Body Model (A114-A), 200-V Machine Model (A115-A)