MICROCHIP ATMEGA328PB-MUR

The ATmega328PB is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega328PB achieves throughputs close to 1MIPS per MHz. This empowers system designer to optimize the device for power consumption versus processing speed. The core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in a single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. The ATmega328PB provides the following features: 32Kbytes of In-System Programmable Flash with Read-While-Write capabilities, 1Kbytes EEPROM, 2Kbytes SRAM, 27 general purpose I/O lines, 32 general purpose working registers, five flexible Timer/Counters with compare modes, internal and external interrupts, two serial programmable USART, two byte-oriented 2-wire Serial Interface (I2C), two SPI serial ports, a 8-channel 10-bit ADC in TQFP and QFN/MLF package, a programmable Watchdog Timer with internal Oscillator, Clock failure detection mechanism and six software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, USART, 2-wire Serial Interface, SPI port, and interrupt system to continue functioning. PTC with enabling up to 24 selfcap and 144 mutual-cap sensors. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or hardware reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. Also ability to run PTC in power-save mode/wake-up on touch and Dynamic on/off of PTC analog and digital portion. The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronous timer, PTC, and ADC to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low power consumption. The device is manufactured using high density non-volatile memory technology. The On-chip ISP Flash allows the program memory to be reprogrammed In-System through an SPI serial interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR core. The Boot program can use any interface to download the application program in the Application Flash memory. Software in the Boot Flash section will continue to run whi

• High Performance, Low Power AVR 8-Bit Microcontroller Family
• Advanced RISC Architecture
• 131 Powerful Instructions
• Most Single Clock Cycle Execution
• 32×8 General Purpose Working Registers
• Fully Static Operation
• Up to 20 MIPS Throughput at 20MHz
• On-Chip 2-Cycle Multiplier
• High Endurance Non-Volatile Memory Segments
• 32KBytes of In-System Self-Programmable Flash program memory, 1KBytes EEPROM, 2KBytes Internal SRAM
• Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
• Data retention: 20 years at 85℃
• Optional Boot Code Section with Independent Lock Bits
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
• Programming Lock for Software Security
• Peripheral Features
• Peripheral Touch Controller (PTC)
• Capacitive Touch Buttons, Sliders and Wheels
• 24 Self-Cap Channels and 144 Mutual Cap Channels
• Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
• Three 16-bit Timer/Counters with Separate Prescaler, Compare Mode, and Capture Mode
• Real Time Counter with Separate Oscillator
• Ten PWM Channels
• 8-channel 10-bit ADC in TQFP and QFN/MLF package
• Two Programmable Serial USARTs
• Two Master/Slave SPI Serial Interfaces
• Two Byte-Oriented 2-Wire Serial Interfaces (Philips I²C Compatible)
• Programmable Watchdog Timer with Separate On-chip Oscillator
• On-Chip Analog Comparator
• Interrupt and Wake-Up on Pin Change
• Special Microcontroller Features
• Power-On Reset and Programmable Brown-Out Detection
• Internal 8 MHz Calibrated Oscillator
• External and Internal Interrupt Sources
• Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and Extended Standby
• Clock Failure Detection Mechanism and Switch to Internal 8 MHz RC Oscillator in case of Failure
• Individual Serial Number to Represent a Unique ID
• I/O and Packages
• 27 Programmable I/O Lines
• 32-pin TQFP and 32-pin QFN/MLF
• Operating Voltage: 1.8 - 5.5V
• Temperature Range: -40℃ to 105℃
• Speed Grade: 0 - 4MHz @ 1.8 - 5.5V, 0 - 10MHz @ 2.7 - 5.5V, 0 - 20MHz @ 4.5 - 5.5V
• Power Consumption at 1MHz, 1.8V, 25℃
• Active Mode: 0.24mA
• Power-Down Mode: 0.2μA
• Power-Save Mode: 1.3μA (Including 32kHz RTC)