TI CD4046BNSR

CD4046B CM0S Micropower Phase-Locked Loop (PLL) consists of a low. power, linear voltage-controlled oscillator (VCO) and two different phase comparators having a common signal-input amplifier and a common comparator input. A 5.2-V zener diode is provided for supply regulation if necessary.

• Very low power consumption: 70 μW (typ.) at vco t₀ = 10 kHz, VDD = 5V
• Operating frequency range up to 1.4 MHz (typ.) at VDD = 10V, R1 = 5 kΩ
• Low frequency drift: 0.04%/°C (typ.) at VDD = 10V
• Choice of two phase comparators: Exclusive-OR network (I), Edge-controlled memory network with phase-pulse output for lock indication (II)
• High VCO linearity: < 1% (typ.) at VDD = 10V
• VCO inhibit control for ON-OFF keying and ultra-low standby power consumption
• Source-follower output of VCO control input (Demod. output)
• Zener diode to assist supply regulation
• Standardized, symmetrical output characteristics
• 100% tested for quiescent current at 20 V
• 5-V, 10-V, and 15-V parametric ratings
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"

• FM demodulator and modulator
• Frequency synthesis and multiplication
• Frequency discriminator
• Data synchronization
• Voltage-to-frequency conversion
• Tone decoding
• FSK - Modems
• Signal conditioning