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GR CD4536NS16ARDQRoHS

Manufacturer
GRAsian Brands
MPN
CD4536NS16ARDQ
LCSC Part #
C22465475
Packaging
SOP-16
Customer #
Key Attributes
CMOS Programmable Timer
Datasheetpdf iconGR CD4536NS16ARDQ
In-Stock: 880
880 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 0.3818$ 0.38
10+$ 0.339$ 3.39
30+$ 0.3184$ 9.55
100+$ 0.2962$ 29.62
500+$ 0.2836$ 141.80
1,000+$ 0.2772$ 277.20
Standard Packaging4000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Clock/Timing/Programmable Timers and Oscillators
ManufacturerGR
PackagingSOP-16
Supply Current-
Operating Temperature-
FeaturesProgrammable time-base frequency division network;Built-in crystal oscillator
ProgrammableYes
Reset Time-
Frequency-
Timer Number-
Voltage - Supply5V;10V;15V

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging4000
Sales UnitPiece

Introduction

AI Translation

CD4536BMS is a programmable timer consisting of 24 ripple binary counter stages. The salient feature of this device is its flexibility. The device can count from 1 to 224 or the first 8 stages can be bypassed to allow an output, selectable by a 4-bit code, from any one of the remaining 16 stages. It can be driven by an external clock or an RC oscillator that can be constructed using on-chip components. Input IN1 serves as either the external clock input or the input to the on-chip RC oscillator. OUT1 and OUT2 are connection terminals for the external RC components. In addition, an on-chip monostable circuit is provided to allow a variable pulse width output. Various timing functions can be achieved using combinations of these capabilities. A logic 1 on the 8-BYPASS input enables a bypass of the first 8 stages and makes stage 9 the first counter stage of the last 16 stages. Selection of 1 of 16 outputs is accomplished by the decoder and the BCD inputs A, B, C and D.MONO IN is the timing input for the on-chip monostable oscillator. Grounding of the MONO IN terminal through a resistor of 10kΩ or higher, disables the one-shot circuit and connects the decoder directly to the DECODE OUT terminal.A resistor to VDD and a capacitor to ground from the MONO IN terminal enables the one-shot circuit and controls its pulse width. A fast test mode is enabled by a logic 1 on 8- BYPASS, SET, and RESET. This mode divides the 24-stage counter into three 8-stage sections to facilitate a fast test sequence.

Features

AI Translation
  • 24 flip-flop stages — counts from 2^0 to 2^24
  • Last 16 stages selectable by BCD select code
  • Bypass input allows bypassing first 8 stages
  • On-chip RC oscillator provision
  • Clock inhibit input
  • Schmitt-trigger in clock line permits operation with very long rise and fall times
  • On-chip monostable output provision
  • Test mode allows fast test sequence
  • Set and reset inputs
  • Standardized symmetrical output characteristics
  • 100% tested for quiescent current at 18V
  • 5V, 10V, and 15V parametric ratings