TOSHIBA 74VHC174FT(TB,BJ)
| Manufacturer | |
| MPN | 74VHC174FT(TB,BJ) |
| LCSC Part # | C22457412 |
| Packaging | TSSOP-16 |
| Customer # | |
| Key Attributes | Hex D-Type Flip-Flop with Clear |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | TOSHIBA | |
| Packaging | TSSOP-16 | |
| Voltage - Supply | 2V~5.5V | |
| Number of Bits per Element | - | |
| Output Type | - | |
| Operating Temperature | -40℃~+125℃ | |
| Series | 74VHC Series | |
| Synchronous/Asynchronous | Asynchronous | |
| Number of Elements | 6 | |
| Current - Output High(IOH) | 8mA | |
| Current - Output Low(IOL) | 8mA | |
| Setup Time | 5ns;4.5ns | |
| Quiescent Current | 4uA | |
| Hold Time | 0ns;500ps | |
| Propagation Delay | 4.9ns@5V,15pF | |
| Trigger Type | Rising Edge |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74VHC174FT is an advanced high speed CMOS HEX D-TYPE FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Information signals applied to D inputs are transferred to the Q output on the positive going edge of the clock pulse. When the CLR input is held low, the Q output are in the low logic level independent of the other inputs. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.
Features
- AEC-Q100 (Rev. H)
- Wide operating temperature range: T_opr = -40 to 125 ℃
- High speed: f_MAX = 175 MHz (typ.) at V_CC = 5 V
- Low power dissipation: I_CC = 4.0 μA (max) at T_a = 25 ℃
- High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
- Power-down protection is provided on all inputs.
- Balanced propagation delays: t_pLH ≈ t_pHL
- Wide operating voltage range: V_CC(opr) = 2.0 V to 5.5 V
- Low noise: V_OLP = 0.8 V (max)
- Pin and function compatible with 74ALS174.
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.2585 | $ 1.29 |
| 50+ | $ 0.2246 | $ 11.23 |
| 150+ | $ 0.21 | $ 31.50 |
| 500+ | $ 0.1906 | $ 95.30 |
| 2,500+ | $ 0.1826 | $ 456.50 |
| 5,000+ | $ 0.1777 | $ 888.50 |
Standard Packaging2500/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | TOSHIBA | |
| Packaging | TSSOP-16 | |
| Voltage - Supply | 2V~5.5V | |
| Number of Bits per Element | - | |
| Output Type | - | |
| Operating Temperature | -40℃~+125℃ | |
| Series | 74VHC Series | |
| Synchronous/Asynchronous | Asynchronous | |
| Number of Elements | 6 | |
| Current - Output High(IOH) | 8mA | |
| Current - Output Low(IOL) | 8mA | |
| Setup Time | 5ns;4.5ns | |
| Quiescent Current | 4uA | |
| Hold Time | 0ns;500ps | |
| Propagation Delay | 4.9ns@5V,15pF | |
| Trigger Type | Rising Edge |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The 74VHC174FT is an advanced high speed CMOS HEX D-TYPE FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Information signals applied to D inputs are transferred to the Q output on the positive going edge of the clock pulse. When the CLR input is held low, the Q output are in the low logic level independent of the other inputs. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.
Features
- AEC-Q100 (Rev. H)
- Wide operating temperature range: T_opr = -40 to 125 ℃
- High speed: f_MAX = 175 MHz (typ.) at V_CC = 5 V
- Low power dissipation: I_CC = 4.0 μA (max) at T_a = 25 ℃
- High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
- Power-down protection is provided on all inputs.
- Balanced propagation delays: t_pLH ≈ t_pHL
- Wide operating voltage range: V_CC(opr) = 2.0 V to 5.5 V
- Low noise: V_OLP = 0.8 V (max)
- Pin and function compatible with 74ALS174.
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

