Corebai Microelectronics CBM16AD80Q
| Manufacturer | Corebai MicroelectronicsAsian Brands |
| MPN | CBM16AD80Q |
| LCSC Part # | C22374154 |
| Packaging | QFN-64(9x9) |
| Customer # | |
| Key Attributes | 1.7V~1.9V QFN-64(9x9) Analog to Digital Converters (ADC) RoHS |
| Datasheet |  Corebai Microelectronics CBM16AD80Q |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | Corebai Microelectronics | |
| Packaging | QFN-64(9x9) | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Synchronous triggering | |
| Resolution(Bits) | 16;125MHz | |
| Voltage - Supply | 1.7V~1.9V | |
| Number of Channels | 2 | |
| Integral non - linearity | 6LSB |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 260 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The CBM16AD125 is a dual-channel, 16-bit, 125MSPS ADC supporting versatile communication applications requiring high performance, low cost, and small form factor. The dual-channel ADC core employs a multistage differential pipeline architecture, with each ADC integrating a high-bandwidth differential sample-and-hold circuit and supporting user-selectable input ranges. An on-chip voltage reference simplifies external design. A duty cycle stabilizer compensates for variations in the ADC clock duty cycle, maintaining excellent converter performance. ADC output data can be routed directly to two external 16-bit output ports, supporting both 1.8V CMOS and LVDS modes. Flexible power-down options significantly reduce power consumption. A 3-wire SPI-compatible serial interface enables configuration of various product functions. The CBM16AD125 is available in a 64-pin QFN package, rated for the -40°C to +85°C industrial temperature range.
Features
- Low power consumption: 800mW@125MSPS
- Supply voltage: 1.8V
- Output level: 1.8V CMOS or LVDS
- SNR = 78dBFS (Fin=70MHz/Fs=125MSPS)
- SFDR = 88dBc (Fin=70MHz/Fs=125MSPS)
- IF sampling rate up to 300MHz
- Integrated 1-to-8 integer input clock divider
- Small-signal input noise: −153dBm/Hz (200Ω input impedance/Fin=70MHz/Fs=125MSPS)
- Programmable internal voltage reference
- Differential analog input range up to 2Vp-p
- Differential analog input bandwidth: 650MHz
- Integrated clock duty cycle stabilizer
- 95dB channel isolation/crosstalk
- SPI control
- User-configurable built-in self-test (BIST)
- Power-saving power-down mode
Applications
- Radar systems
- Diversity radio systems
- Multi-mode digital receivers (3G)
- GSM/EDGE/W-CDMA/LTE/CDMA2000/WiMAX/TD-SCDMA
- I/Q demodulation systems
- Smart antenna systems
- Universal software-defined radio
- Wideband data applications
- Ultrasound equipment
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 148.5622 | $ 148.56 |
| 260+ | $ 59.2777 | $ 15412.20 |
| 520+ | $ 57.2978 | $ 29794.86 |
| 1,040+ | $ 56.3177 | $ 58570.41 |
Standard Packaging260/Full Tray | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | Corebai Microelectronics | |
| Packaging | QFN-64(9x9) | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Synchronous triggering | |
| Resolution(Bits) | 16;125MHz | |
| Voltage - Supply | 1.7V~1.9V | |
| Number of Channels | 2 | |
| Integral non - linearity | 6LSB |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 260 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The CBM16AD125 is a dual-channel, 16-bit, 125MSPS ADC supporting versatile communication applications requiring high performance, low cost, and small form factor. The dual-channel ADC core employs a multistage differential pipeline architecture, with each ADC integrating a high-bandwidth differential sample-and-hold circuit and supporting user-selectable input ranges. An on-chip voltage reference simplifies external design. A duty cycle stabilizer compensates for variations in the ADC clock duty cycle, maintaining excellent converter performance. ADC output data can be routed directly to two external 16-bit output ports, supporting both 1.8V CMOS and LVDS modes. Flexible power-down options significantly reduce power consumption. A 3-wire SPI-compatible serial interface enables configuration of various product functions. The CBM16AD125 is available in a 64-pin QFN package, rated for the -40°C to +85°C industrial temperature range.
Features
- Low power consumption: 800mW@125MSPS
- Supply voltage: 1.8V
- Output level: 1.8V CMOS or LVDS
- SNR = 78dBFS (Fin=70MHz/Fs=125MSPS)
- SFDR = 88dBc (Fin=70MHz/Fs=125MSPS)
- IF sampling rate up to 300MHz
- Integrated 1-to-8 integer input clock divider
- Small-signal input noise: −153dBm/Hz (200Ω input impedance/Fin=70MHz/Fs=125MSPS)
- Programmable internal voltage reference
- Differential analog input range up to 2Vp-p
- Differential analog input bandwidth: 650MHz
- Integrated clock duty cycle stabilizer
- 95dB channel isolation/crosstalk
- SPI control
- User-configurable built-in self-test (BIST)
- Power-saving power-down mode
Applications
- Radar systems
- Diversity radio systems
- Multi-mode digital receivers (3G)
- GSM/EDGE/W-CDMA/LTE/CDMA2000/WiMAX/TD-SCDMA
- I/Q demodulation systems
- Smart antenna systems
- Universal software-defined radio
- Wideband data applications
- Ultrasound equipment
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |