Intel/Altera DK-DEV-10M50F484-B

This datasheet describes the electrical characteristics, switching characteristics, configuration specifications, and timing of Intel MAX 10 devices.

• Intel MAX 10 devices are rated according to a set of defined parameters.
• To maintain optimal performance and reliability of Intel MAX 10 devices, the operating requirements described in this section must be observed.
• During transitions, for input currents less than 100 mA and periods shorter than 20 ns, input signals may overshoot to the voltages listed in the table below and undershoot to -2.0 V.
• The maximum allowable overshoot duration is specified as a percentage of high-level time over the device lifetime.
• The VCCA of single-supply devices must be connected to VCC_ONE through a filter.
• VCCIO for all I/O banks must be powered up in user mode, as the VCCIO I/O banks are used for ADC and I/O functions.
• All VCCA pins must be supplied with 2.5 V (even when PLL is not in use) and must be powered up and powered down simultaneously.
• VCCD_PLL must always be connected to VCC through decoupling capacitors and ferrite beads.
• -40℃ applies only when the device is powered up at the start of testing; the device will not remain at the minimum junction temperature for an extended period.
• There is no absolute minimum ramp time requirement; the minimum ramp time characterized by Intel is 200 μs.
• The E/P cycle count applies to the smallest possible flash block that can be erased or programmed within each Intel MAX 10 device; each Intel MAX 10 device contains multiple flash pages per device.