RENESAS SLG46582V-DIP
| Manufacturer | |
| MPN | SLG46582V-DIP |
| LCSC Part # | C22249411 |
| Packaging | - |
| Customer # | |
| Key Attributes | Embedded Complex Logic (FPGA, CPLD) Evaluation Boards RoHS |
| Datasheet |  RENESAS SLG46582V-DIP |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Development Boards, Kits, Programmers/Evaluation Boards/Embedded Complex Logic (FPGA, CPLD) Evaluation Boards | |
| Manufacturer | RENESAS | |
| Packaging | - |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The SLG46580/82/83 is a small, low-power component typically used to integrate mixed-signal functions under the control of an asynchronous state machine. Users configure the SLG46580/82/83's interconnect logic, I/O pins, and macrocells by programming a one-time non-volatile memory (NVM) to create circuit designs. This highly versatile device allows multiple functions and control logic to be implemented within a very compact, low-power monolithic IC. The macrocells in the device include: four analog comparators (ACMPs), a voltage reference (Vref) for ACMPs, an analog temperature sensor, fifteen combinational function macrocells, three selectable DFF/latches or 2-bit LUTs, six selectable DFF/latches or 3-bit LUTs, one selectable pipe delay or ripple counter or 3-bit LUT, five 8-bit delay/counters or 3-bit LUTs, combinational logic, one 4-bit LUT with two outputs, an asynchronous state machine (eight states with flexible input logic from state transitions), a real-time clock (RTC) binary counter, four three-mode 150 mA LDO regulators (for SLG46580, including high-power mode, low-power mode, and power switch mode), two three-mode 300 mA LDO regulators (for SLG46582), one three-mode 600 mA LDO regulator (for SLG46583), serial communication (I²C slave protocol interface), programmable delay with edge detector output, additional logic functions (two debounce filters with edge detectors), two oscillators (a configurable 25 kHz/2 MHz oscillator and a 1.73 kHz low-power oscillator), eight-byte RAM + OTP user memory (RAM memory space readable and writable via I²C, with user-defined initial values transferred from OTP), and a power-on reset (POR) circuit.
Features
- Programmable asynchronous state machine
- Logic and mixed-signal circuitry
- Highly versatile macro cells
- Readback protection (read lock)
- Four 150 mA LDO regulators (SLG46580)
- Two 300 mA LDO regulators (SLG46582)
- One 600 mA LDO regulator (SLG46583)
- 2.5 V (±8%) to 5 V (±10%) supply voltage
- Operating temperature range: -40°C ~ 85°C
- RoHS compliant / Halogen-free
- 20-pin STQFN package: 2 × 3 × 0.55 mm, 0.4 mm pitch
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 4.7358 | $ 4.74 |
| 200+ | $ 1.8909 | $ 378.18 |
| 500+ | $ 1.8274 | $ 913.70 |
| 1,000+ | $ 1.7956 | $ 1795.60 |
Standard Packaging1/Full Bag | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Development Boards, Kits, Programmers/Evaluation Boards/Embedded Complex Logic (FPGA, CPLD) Evaluation Boards | |
| Manufacturer | RENESAS | |
| Packaging | - |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The SLG46580/82/83 is a small, low-power component typically used to integrate mixed-signal functions under the control of an asynchronous state machine. Users configure the SLG46580/82/83's interconnect logic, I/O pins, and macrocells by programming a one-time non-volatile memory (NVM) to create circuit designs. This highly versatile device allows multiple functions and control logic to be implemented within a very compact, low-power monolithic IC. The macrocells in the device include: four analog comparators (ACMPs), a voltage reference (Vref) for ACMPs, an analog temperature sensor, fifteen combinational function macrocells, three selectable DFF/latches or 2-bit LUTs, six selectable DFF/latches or 3-bit LUTs, one selectable pipe delay or ripple counter or 3-bit LUT, five 8-bit delay/counters or 3-bit LUTs, combinational logic, one 4-bit LUT with two outputs, an asynchronous state machine (eight states with flexible input logic from state transitions), a real-time clock (RTC) binary counter, four three-mode 150 mA LDO regulators (for SLG46580, including high-power mode, low-power mode, and power switch mode), two three-mode 300 mA LDO regulators (for SLG46582), one three-mode 600 mA LDO regulator (for SLG46583), serial communication (I²C slave protocol interface), programmable delay with edge detector output, additional logic functions (two debounce filters with edge detectors), two oscillators (a configurable 25 kHz/2 MHz oscillator and a 1.73 kHz low-power oscillator), eight-byte RAM + OTP user memory (RAM memory space readable and writable via I²C, with user-defined initial values transferred from OTP), and a power-on reset (POR) circuit.
Features
- Programmable asynchronous state machine
- Logic and mixed-signal circuitry
- Highly versatile macro cells
- Readback protection (read lock)
- Four 150 mA LDO regulators (SLG46580)
- Two 300 mA LDO regulators (SLG46582)
- One 600 mA LDO regulator (SLG46583)
- 2.5 V (±8%) to 5 V (±10%) supply voltage
- Operating temperature range: -40°C ~ 85°C
- RoHS compliant / Halogen-free
- 20-pin STQFN package: 2 × 3 × 0.55 mm, 0.4 mm pitch
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |