ST M95M02-DWMN3TP/K
| Manufacturer | |
| MPN | M95M02-DWMN3TP/K |
| LCSC Part # | C222181 |
| Packaging | SO-8 |
| Customer # | |
| Key Attributes | Automotive 2 Mbit serial SPI bus EEPROM |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | ST | |
| Packaging | SO-8 | |
| Voltage - Supply | 2.5V~5.5V | |
| Memory Size | 2Mbit | |
| Operating temperature | -40℃~+125℃ | |
| Clock Frequency | 10MHz | |
| Features | Hardware write protection function;Built-in power-on reset (POR);Built-in error correction code (ECC) function;Built-in write enable latch (WEL);Page write protection function | |
| Data Retention - TDR (Year) | 100 Years | |
| Write Cycle Time(tWC) | 5ms | |
| Write Cycle Endurance | 4,000,000 Cycles | |
| Interface | SPI |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The M95M02-A125 is 2-Mbit serial EEPROM Automotive grade device operating up to 125℃. The M95M02-A125 is compliant with the very high level of reliability defined by the Automotive standard AEC-Q100 grade 0. The device is accessed by a simple serial SPl compatible interface running up to 10 MHz. The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95M02-A125 is byte-alterable memories (262144x8 bits) organized as 1024 pages of 256 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic. The M95M02-A125 offers an additional Identification Page (256 byte) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode.
Features
- Compatible with the Serial Peripheral Interface (SPI) bus
- Memory array - 2 Mbit (256 Kbyte) of EEPROM - Page size: 256 byte - Write protection by block: 1/4, 1/2 or whole memory - Additional Write lockable Page (ldentification page)
- Extended temperature and voltage ranges - Up to 125℃ (VCC from 2.5V to 5.5V)
- Clock frequency 10 MHz for VCC ≥ 4.5V @ 105℃ - 5 MHz for VCC ≥ 2.5V @ 125℃
- Schmitt trigger inputs for noise filtering
- Short Write cycle time - Byte Write within 5 ms - Page Write within 5 ms
- Write cycle endurance - 4 million Write cycles at 25℃ - 1.2 million Write cycles at 85℃ - 100 k Write cycles at 125℃
- Data retention - 100 years at 25℃
- ESD Protection (Human Body Model) - 3000 V
- Packages - RoHS-compliant and halogen-free (ECOPACK2)
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 2.8451 | $ 2.85 |
| 10+ | $ 2.4111 | $ 24.11 |
| 30+ | $ 2.1521 | $ 64.56 |
| 100+ | $ 1.8914 | $ 189.14 |
| 500+ | $ 1.7715 | $ 885.75 |
| 1,000+ | $ 1.7165 | $ 1716.50 |
Standard Packaging2500/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | ST | |
| Packaging | SO-8 | |
| Voltage - Supply | 2.5V~5.5V | |
| Memory Size | 2Mbit | |
| Operating temperature | -40℃~+125℃ | |
| Clock Frequency | 10MHz | |
| Features | Hardware write protection function;Built-in power-on reset (POR);Built-in error correction code (ECC) function;Built-in write enable latch (WEL);Page write protection function | |
| Data Retention - TDR (Year) | 100 Years | |
| Write Cycle Time(tWC) | 5ms | |
| Write Cycle Endurance | 4,000,000 Cycles | |
| Interface | SPI |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The M95M02-A125 is 2-Mbit serial EEPROM Automotive grade device operating up to 125℃. The M95M02-A125 is compliant with the very high level of reliability defined by the Automotive standard AEC-Q100 grade 0. The device is accessed by a simple serial SPl compatible interface running up to 10 MHz. The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M95M02-A125 is byte-alterable memories (262144x8 bits) organized as 1024 pages of 256 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic. The M95M02-A125 offers an additional Identification Page (256 byte) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode.
Features
- Compatible with the Serial Peripheral Interface (SPI) bus
- Memory array - 2 Mbit (256 Kbyte) of EEPROM - Page size: 256 byte - Write protection by block: 1/4, 1/2 or whole memory - Additional Write lockable Page (ldentification page)
- Extended temperature and voltage ranges - Up to 125℃ (VCC from 2.5V to 5.5V)
- Clock frequency 10 MHz for VCC ≥ 4.5V @ 105℃ - 5 MHz for VCC ≥ 2.5V @ 125℃
- Schmitt trigger inputs for noise filtering
- Short Write cycle time - Byte Write within 5 ms - Page Write within 5 ms
- Write cycle endurance - 4 million Write cycles at 25℃ - 1.2 million Write cycles at 85℃ - 100 k Write cycles at 125℃
- Data retention - 100 years at 25℃
- ESD Protection (Human Body Model) - 3000 V
- Packages - RoHS-compliant and halogen-free (ECOPACK2)
C222181 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | 3A991B1B1 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | 3A991B1B1 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |



