ISSI IS49RL18640-093FBL

Products Specifications

Type	Description	All
Category	Integrated Circuits (ICs)/Memory/Memory (ICs)
Manufacturer	ISSI
Packaging	-

AI Translation

1200 MHz DDR operation (2400 Mb/s/bal data rate)
Organization - 64 Meg x 18, and 32 Meg x 36 common I/0 (Cl0) - 16 banks
1.2V center-terminated push/pull I/0
2.5V V_EXT, 1.35V V_DD, 1.2V V_DDQ (optional 1.35V VDDQ for 2400 operation only)
Reduced cycle time (tRC(MIN)=6.67 - 8ns)
SDR addressing
Programmable READ/WRITE latency (RL/WL) and burst length
Data mask for WRITE commands
Differential input clocks (CK, CK#)
Free-running differential input data clocks (DKx, DKx#) and output data clocks (QKx, QKx#)
On-die DLL generates CK edge-aligned data and differential output data clock signals
64ms refresh (128K refresh per 64ms)
168-ball FBGA package 40Ω or 60Ω matched impedance outputs
Integrated on-die termination (ODT)
Single or multibank writes
Extended operating range (200 - 1200 MHz)
READ training register
Multiplexed and non-multiplexed addressing capabilities
Mirror function
Output driver and ODT calibration
Post Package Repar - 1 row per half bank
JTAG interface (IEEE 1149.1 - 2001)
Clock cycle and tRC timing: 0.83ns and tRC(MIN)=6.67ns (RL3 - 2400) for -083F; 0.83ns and tRC(MIN)=7.5ns (RL3 - 2400) for -083E; 0.93ns and tRC(MIN)=7.5ns (RL3 - 2133) for -093F; 0.93ns and tRC(MIN)=8ns (RL3 - 2133) for -093E; 1.07ns and tRC(MIN)=8ns (RL3 - 1866) for -107E
Configuration - 64 Meg x 18 - 32 Meg x 36
Operating Temperature: Commercial (TC = 0℃ to +95℃); Industrial (TC = -40℃ to +95℃)
Package 168-ball FBGA (Green)

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