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TI SN74LVC2G125DCTR product image
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TI SN74LVC2G125DCTRRoHS

Manufacturer
TI
MPN
SN74LVC2G125DCTR
LCSC Part #
C206035
Packaging
SSOP-8
Customer #
Key Attributes
Dual Bus Buffer Gate With 3-State Outputs
Datasheetpdf iconTI SN74LVC2G125DCTR
In-Stock: 3,342
3,342 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 0.6401$ 0.64
10+$ 0.531$ 5.31
30+$ 0.4756$ 14.27
100+$ 0.4219$ 42.19
500+$ 0.3893$ 194.65
1,000+$ 0.373$ 373.00
Standard Packaging3000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers
ManufacturerTI
PackagingSSOP-8
Input type-
Voltage - Supply1.65V~5.5V
Output TypeTri-State
Current - Output High(IOH)32mA
Series74LVC
Operating Temperature-40℃~+125℃
Current - Output Low(IOL)32mA
Number of Bits per Element1
Channel TypeUnidirectional
FeaturesPower-off isolation;Output enable;Level shifting
Number of Elements2
Propagation Delay4.3ns@3.3V,50pF
Quiescent Current10uA
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging3000
Sales UnitPiece

Introduction

AI Translation

The SN74LVC2G125 device is a dual bus buffer gate, designed for 1.65-V to 5.5-V V(CC) operation. This device features dual line drivers with 3-state outputs. The outputs are disabled when the associated output-enable (OE(overline)) input is high.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

To ensure the high-impedance state during power up or power down, OE should be tied to V(CC) through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using I(off). The I(off) circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Features

AI Translation
  • ESD Protection Exceeds JESD 22 2000-V Human-Body Model 1000-V Charged-Device Model
  • Available in the Texas Instruments NanoFree™ Package
  • Supports 5-V V(CC) Operation
  • Inputs Accept Voltages to 5.5 V
  • Max t(pd) of 4.3 ns at 3.3 V
  • Low Power Consumption, 10-μA Max ICC
  • ±24 -mA Output Drive at 3.3 V
  • Typical V(OLP) (Output Ground Bounce) <0.8 V at V(CC)=3.3 V, T(A)=25℃
  • Typical V(OHV) (Output V(OH) Undershoot) >2 V at V(CC)=3.3 V, T(A)=25℃
  • I(off) Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Can Be Used as a Down Translator to Translate Inputs From a Max of 5.5 V Down to the V(CC) Level
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

Applications

AI Translation

Cable Modem Termination Systems High-Speed Data Acquisition and Generation Motor Controls: High-Voltage Power Line Communication Modems SSDs: Internal or External Video Broadcasting and Infrastructure: Scalable Platforms Video Broadcasting: IP-Based Multi-Format Transcoders Video Communications Systems