MICROCHIP LAN91C113-NC

Single-chip Ethernet controller Dual-speed - 10/100 Mbps Full support for full-duplex switched Ethernet 8 KB internal memory for RX and TX FIFO buffers Enhanced power management Optional configuration via serial EEPROM interface 8-bit and 16-bit CPU access support Internal 16-bit wide data path (into packet buffer memory) Early TX, Early RX functionality Built-in transparent arbitration for slave sequential access architecture Flat MMU architecture with symmetric TX/RX structure and queues 3.3V operating voltage with 5V-tolerant I/O buffers (see pin list description for details) Single 25 MHz reference clock shared by PHY and MAC External 25 MHz output pin for external PHY media support Low-power CMOS design Multiple embedded processor host interface support - ARM - SH - Power PC - Coldfire - 680X0, 683XX MIPS R3000 3.3V MII MAC-PHY interface operating at nibble rate MII management serial interface 128-pin QFP package; green lead-free package also available 128-pin TQFP package, 1.0 mm height; green lead-free package also available Temperature range 0°C to 85°C

Fully integrated IEEE 802.3/802.3u 100Base-TX/10Base-T PHY Auto-negotiation: 10/100, full/half duplex On-chip waveform shaping — no external filters required Adaptive equalization baseline wander correction LED outputs (user-selectable — up to 2 LED functions simultaneously) - Link - Activity - Full Duplex - 10/100 TX - RX

• 10/100Base-TX / 10Base-T physical layer
• Embedded applications
• 100Base-TX/10Base-T adapter cards
• Motherboards
• Repeaters
• Switching hubs