The FT 5000 Smart Transceiver includes three independent 8-bit logical processors to manage the physical MAC layer, the network, and the user application. These are called the Media-Access Control (MAC) processor, the network (NET) processor, and the application (APP) processor, respectively. At higher system clock rates, there is also a fourth processor to handle interrupts.
The FT 5000 Smart Transceiver supports polarity-insensitive cabling using a star, bus, daisy-chain, loop, or combination topology. Thus, installers don’t have to follow a strict set of wiring rules imposed by other networking technologies. Instead, they can install wiring in the fastest and most cost-effective manner, thereby saving time and money. Free topology wiring also simplifies network expansion by eliminating restrictions on wire routing, splicing, and device placement.
The FT-X3 Communications Transformer is a surface mount communications transformer that’s compatible with both the FT 5000 Smart Transceiver and the previous-generation FT 3120/FT 3150 Smart Transceivers. The FT-X3 Communications Transformer provides equivalent noise immunity to both the FT-X1 and FT-X2 Communication Transformers, the previous-generation communication transformers. However, the FT-X3 Communications Transformer is not pin-compatible with the FT-X2 Communication Transformer. The FT 5000 Smart Transceiver can also be used with the FT-X1 and FT-X2 Communication Transformers.
The FT 5000 Smart Transceiver is fully compliant with the TP/FT-10 channel and can communicate with devices that use Echelon’s FTT-10/FTT-10A Transceivers, FT 3120/FT 3150 Smart Transceivers, or LPT-10/LPT-11 Link Power Transceivers.
The Neuron Core in the FT 5000 Smart Transceiver uses the same instruction set and architecture as the previous-generation Neuron Core, with two new additional instructions for hardware multiplication and division. The Series 5000 Neuron Core is source code compatible with applications written for the Series 3100 Neuron Core. Applications written for the Series 3100 Neuron Core must be recompiled with the NodeBuilder FX Development Tool or the Mini FX Evaluation Kit before they can be used with the FT 5000 Smart Transceiver.
The FT 5000 Smart Transceiver uses Neuron firmware version 19. Firmware versions prior to version 19 are not compatible with the FT 5000 Smart Transceiver. The Neuron firmware is pre-programmed into the on-chip ROM. The FT 5000 Smart Transceiver can also be configured to read newer firmware from external memories, allowing the firmware to be upgraded over time.
Faster system clock. The internal system clock for the FT 5000 Smart Transceiver can be user-configured to run from 5MHz to 80MHz. The required external crystal provides a 10MHz clock frequency, and an internal PLL boosts the frequency to a maximum of 80MHz as the internal system clock speed. The previous-generation Neuron 3120/3150 Core divided the external oscillator frequency by two to create the internal system clock. An FT 5000 Smart Transceiver running with an 80MHz internal system clock is thus 16 times faster than a 10MHz Neuron 3120/3150 Core running.
The 5MHz internal system clock mode in the FT 5000 Smart Transceiver provides backward compatibility to support timing-critical applications designed for the 10MHz FT 3150 or FT 3120 Smart Transceiver.
The Neuron Core inside the FT 5000 Smart Transceiver includes a built-in hardware multiplier and divider to increase the performance of arithmetic operations.
Support for more network variables. Because it uses Neuron firmware version 19, the FT 5000 Smart Transceiver supports applications with up to 254 network variables and 127 aliases for Neuron hosted devices (devices without a host microprocessor).
RENESAS 14235R-500