MICROCHIP EQCO62X20C1-I/3DW

The EQCO125X40 is a single chip (equalizer, driver, reclocker) that repeats high-speed 8b/10b coded data signals with a downstream bit-rate between 1.25 to 12.5 Gbps. From a cable or PCB trace pair, the signal is received by an auto-adaptive equalizer that compensates for higher-frequency losses in the preceding channel. A reference-less Clock-Data Recovery (CDR) subsequently self-adapts to the incoming bit-rate and resets the jitter back to a low value for maintaining signal integrity. A cable driver launches this clean signal back onto a cable or PCB trace pair. When placed in series as a repeater, a signal can travel through several EQCO125X40 Family devices to the destination. The EQCO125X40 CDR restores signal integrity at each link along the way.

The high-speed direction (or downlink) has a simultaneous complementary uplink, operating at 20.833 Mbps or 41.666 Mbps 8b/10b coded signaling. This uplink also includes an equalizer, a reference-less CDR and a cable driver, operating with a transparent full-duplex and self-adaptive downlink.

The EQCO125X40 Family can be used as a CoaXPress transmitter inside a camera, as a CoaXPress receiver inside a frame grabber and as a CoaXPress repeater inside an active coax cable or link. It can also be used as a generic high-speed signaling transport for any 8b/10b application. In general it can be regarded as an ideal means for using the high bit-rate ports on an FPGA in real-world applications. This allows the highspeed signal to get an increase in signal integrity along its signaling path at strategic places: e.g. when changing the signaling nature from single-ended to differential or vice-versa, after long runs of cable, or recovering the signal from skin effect and/or dielectric losses. The CDR resets accumulated jitter due to small impedance mismatches, non-ideal connectors, PCB-vias, etc., and yields better signal integrity. This is also useful when the signal chain includes an optical link.

• Equalizer for up to 40m of coaxial cable at 12.5 Gbps or up to 130m at 1.25 Gbps using Belden 1694A cable
• Same chip used at Device (Camera) and Host (Frame Grabber) for asymmetric full-duplex communication
• Lower Cost version EQCO125T40 for Device (Camera) side only
• Cable types supported are 75Ω coax, 50Ω coax, and 100Ω STP (Shielded Twisted Pair)
• Simultaneous signaling over a single cable: Up to 12.5 Gbps downlink 21 or 42 Mbps uplink Power over Coax
• Can also be used as a stand-alone cable repeater with simultaneous power, downlink and uplink over a single cable
• Integrated termination resistors for differential signaling
• CDR (Clock-Data Recovery) restores signal integrity in both directions
• Both Uplink and Downlink include equalizer, CDR and Cable driver
• Reference-clock free operation (no crystal or clock needed)
• Low power consumption / single supply @ 1.25 V
• 16-pin, 0.65 mm pin pitch, 4 mm QFN package
• Small PCB footprint for EQCO125X40 Family with few off-chip components
• Industrial temperature range
• Pb-free and RoHS compliant

• CoaXPress compliant systems, supports all CoaXPress standards and speeds
• Links for high-definition Cameras
• Links between FPGAs
• High-speed capture cards over long cable lengths
• Machine Vision, Medical, Broadcast and Surveillance cameras, Intelligent Traffic Systems
• When a single cable carrying power, video data and camera control stream is needed