GR CD4060S

The CD4060 consists of an oscillator and a 14-stage binary ripple counter. The oscillator can be configured with either an external RC network or a crystal circuit. When RESET is high, the counter is cleared and the oscillator is disabled. All counter stages are master-slave flip-flops, which count in binary on the falling edge of Φ0̄ (and Φ0). A Schmitt trigger on the clock input line limits the clock rise and fall times.

• Low input current: I_IN ≤ 1uA, V_IN = V_DD - V_SS = 15V, Ta = 25°C
• Low quiescent current: I_DD = 0.2uA (typical), V_DD - V_SS = 15V, Ta = 25°C
• External RC or crystal oscillator circuit configuration
• Wide supply voltage range V_DD - V_SS: 3V ~ 15V
• Schmitt trigger input for noise immunity
• Package: DIP16, SOP16

Timer/Counter, Signal Generator, Frequency Meter