TI TAS3002PFBR
| Manufacturer | |
| MPN | TAS3002PFBR |
| LCSC Part # | C19753141 |
| Packaging | TQFP-48(7x7) |
| Customer # | |
| Key Attributes | 32kHz~48kHz TQFP-48(7x7) Audio Special Purpose RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Audio Special Purpose | |
| Manufacturer | TI | |
| Packaging | TQFP-48(7x7) | |
| Resolution (Bits) | 32kHz~48kHz | |
| Operating Temperature | - | |
| Type | Processor;Encoder/decoder | |
| Features | Built-in phase-locked loop;On-chip digital gain;Mute control | |
| Interface | I2C;I2S | |
| Voltage - Supply | 3.3V |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The TAS3002 device is a system-on-a-chip that replaces conventional analog equalization to perform digital parametric equalization, dynamic range compression, and loudness contour. Additionally, this device provides high-quality, soft digital volume, bass, and treble control. All control parameters are uploaded from an outside MCU through the |20⟩ slave port or from an external EEPROM through the |20⟩ master port. The TAS3002 device also has an integrated 24-bit stereo codec with two |20⟩ -selectable, single-ended inputs per channel. The digital parametric equalization consists of seven cascaded, independent biquad filters per channel. Each biquad filter has five 24-bit coefficients that can be configured into many different filter functions (such as band-pass, high-pass, and low-pass). The internal loudness contour algorithm can be controlled and programmed with an |20⟩ command. Dynamic range compression/expansion (DRCE) is programmable through the |20⟩ port. The system designer can set the threshold, energy estimation time constant, compression ratio, and attack and decay time constants. The TAS3002 device supports 13 serial interface formats ( |2S, left justified, right justified) with data word lengths of 16, 18, 20, or 24 bits. The sampling frequency (fS) may be set to 32 kHz, 44.1 kHz, or 48 kHz. The TAS3002 device uses a system clock generated by the internal phase-locked loop (PLL). The reference clock for the PLL is provided by an external master clock (MCLK) of 256fS or 512fS, or a 256fS crystal. The TAS3002 device has six internally configurable general-purpose input (GPI) terminals that control volume, bass, treble, and equalization. Each GPI terminal has a debounce algorithm that is programmed into the TAS3002 internal microcontroller.
Features
- Programmable seven-band parametric equalization
- Programmable digital volume control
- Programmable digital bass and treble control
- Programmable dynamic range compression/expansion (DRCE)
- Programmable loudness contour/dynamic bass control
- Configurable serial port for audio data
- Two input data channels that can be mixed with digital data from the analog-to-digital converter (ADC) of the codec (analog input). These channels are controlled by |20⟩ commands.
- Three output data channels: Left and right data go through equalization; bass, treble, DRCE, and volume to SDOUT1; SDOUT2 mixes left and right data. SDOUT2 operates as a center channel or subwoofer channel. The output of the ADC is available for additional processing.
- Capability to digitally mix left and right input channels for a monaural output to facilitate subwoofer operation
- Serial I2C master/slave port that allows:
- Downloading of control data to the device externally from the EEPROM or an I2C master
- Controlling other |20⟩ devices
- Two I2C-selectable, single-ended analog input stereo channels
- Equalization bypass mode
- Single 3.3-V power supply
- Power down without reloading the coefficients
- Sampling rates of 32 kHz, 44.1 kHz, or 48 kHz
- Master clock frequency of 256fS or 512fS
- Can have crystal input to replace MCLK. Crystal input frequency is 256fS.
- Six GPI terminals for volume, bass, treble up/down control, mute, and selection of equalization filters
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 12.4187 | $ 12.42 |
| 200+ | $ 4.9559 | $ 991.18 |
| 500+ | $ 4.7901 | $ 2395.05 |
| 1,000+ | $ 4.708 | $ 4708.00 |
Standard Packaging1000/Full Bag | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Audio Special Purpose | |
| Manufacturer | TI | |
| Packaging | TQFP-48(7x7) | |
| Resolution (Bits) | 32kHz~48kHz | |
| Operating Temperature | - | |
| Type | Processor;Encoder/decoder | |
| Features | Built-in phase-locked loop;On-chip digital gain;Mute control | |
| Interface | I2C;I2S | |
| Voltage - Supply | 3.3V |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The TAS3002 device is a system-on-a-chip that replaces conventional analog equalization to perform digital parametric equalization, dynamic range compression, and loudness contour. Additionally, this device provides high-quality, soft digital volume, bass, and treble control. All control parameters are uploaded from an outside MCU through the |20⟩ slave port or from an external EEPROM through the |20⟩ master port. The TAS3002 device also has an integrated 24-bit stereo codec with two |20⟩ -selectable, single-ended inputs per channel. The digital parametric equalization consists of seven cascaded, independent biquad filters per channel. Each biquad filter has five 24-bit coefficients that can be configured into many different filter functions (such as band-pass, high-pass, and low-pass). The internal loudness contour algorithm can be controlled and programmed with an |20⟩ command. Dynamic range compression/expansion (DRCE) is programmable through the |20⟩ port. The system designer can set the threshold, energy estimation time constant, compression ratio, and attack and decay time constants. The TAS3002 device supports 13 serial interface formats ( |2S, left justified, right justified) with data word lengths of 16, 18, 20, or 24 bits. The sampling frequency (fS) may be set to 32 kHz, 44.1 kHz, or 48 kHz. The TAS3002 device uses a system clock generated by the internal phase-locked loop (PLL). The reference clock for the PLL is provided by an external master clock (MCLK) of 256fS or 512fS, or a 256fS crystal. The TAS3002 device has six internally configurable general-purpose input (GPI) terminals that control volume, bass, treble, and equalization. Each GPI terminal has a debounce algorithm that is programmed into the TAS3002 internal microcontroller.
Features
- Programmable seven-band parametric equalization
- Programmable digital volume control
- Programmable digital bass and treble control
- Programmable dynamic range compression/expansion (DRCE)
- Programmable loudness contour/dynamic bass control
- Configurable serial port for audio data
- Two input data channels that can be mixed with digital data from the analog-to-digital converter (ADC) of the codec (analog input). These channels are controlled by |20⟩ commands.
- Three output data channels: Left and right data go through equalization; bass, treble, DRCE, and volume to SDOUT1; SDOUT2 mixes left and right data. SDOUT2 operates as a center channel or subwoofer channel. The output of the ADC is available for additional processing.
- Capability to digitally mix left and right input channels for a monaural output to facilitate subwoofer operation
- Serial I2C master/slave port that allows:
- Downloading of control data to the device externally from the EEPROM or an I2C master
- Controlling other |20⟩ devices
- Two I2C-selectable, single-ended analog input stereo channels
- Equalization bypass mode
- Single 3.3-V power supply
- Power down without reloading the coefficients
- Sampling rates of 32 kHz, 44.1 kHz, or 48 kHz
- Master clock frequency of 256fS or 512fS
- Can have crystal input to replace MCLK. Crystal input frequency is 256fS.
- Six GPI terminals for volume, bass, treble up/down control, mute, and selection of equalization filters
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

