The CMOS bq4011/Y/LY is a nonvolatile 262,144-bit SRAM organized as 32,768 words × 8 bits. Integrated control circuitry and a lithium energy source provide reliable nonvolatility while retaining the unlimited write cycles of a standard SRAM. The control circuit continuously monitors the single supply for out-of-tolerance conditions. When VCC goes out of tolerance, the SRAM is unconditionally write-protected to prevent inadvertent write operations. At this point, the integrated energy source is activated to maintain memory data until VCC returns to normal. The bq4011/Y/LY employs a CMOS SRAM with ultra-low standby current combined with a small lithium coin cell, eliminating the need for long write cycle times and the write cycle limitations associated with EEPROM. The bq4011/Y/LY requires no external circuitry and is pin-compatible with industry-standard 256 kb SRAMs. When power is valid, the bq4011/Y/LY operates as a standard CMOS SRAM. During power-down and power-up cycles, the bq4011/Y/LY functions as a nonvolatile memory, automatically protecting and retaining memory contents. The power-down/power-up control circuit continuously monitors VCC for the power-fail detection threshold VPFD. The bq4011 monitors a typical VPFD = 4.62 V for use in 5 V systems with 5% supply tolerance; the bq4011Y monitors a typical VPFD = 4.37 V for use in 5 V systems with 10% supply tolerance; the bq4011LY monitors a typical VPFD = 2.90 V for use in 3.3 V systems. When VCC falls below the VPFD threshold, the SRAM automatically write-protects the data. All outputs go to high impedance and all inputs are treated as don't-care. If a valid access is in progress at the time of power-fail detection, the memory cycle is allowed to complete. If the memory cycle does not terminate within time tWPT, write protection is enforced. As VCC falls below VPFD and approaches VSO, the control circuit switches to the internal lithium backup supply, which provides data retention until valid VCC is applied. When VCC recovers to a level above the internal backup battery voltage, the supply switches back to VCC. After VCC rises above the VPFD threshold, write protection is maintained for a duration tCER (120 ms maximum in 5 V systems, 85 ms maximum in 3.3 V systems) to allow the processor to stabilize. Normal memory operation may then resume. The internal coin cell used in the bq4011/Y/LY has an extremely long shelf life and provides greater than 10 years of data retention during system power-down. When shipped from Texas Instruments (TI), the integrated lithium battery in MT-type modules is electrically isolated from the memory (the self-discharge rate in this state is approximately 0.5% per year). Upon first application of VCC, this isolation is broken and the lithium backup supply provides data retention during subsequent power-down events.