TI F280049PZS
| Manufacturer | |
| MPN | F280049PZS |
| LCSC Part # | C194119 |
| Packaging | LQFP-100(14x14) |
| Customer # | |
| Key Attributes | 32-Bit CPU microcontroller with communication peripherals, analog systems, enhanced control peripherals, etc. |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | TI | |
| Packaging | LQFP-100(14x14) | |
| DAC (Bit) | 12bit | |
| ADC (Bit) | 12bit | |
| Operating Temperature | -40℃~+125℃@(TJ) | |
| Program Memory Type | FLASH | |
| Voltage - Supply | 1.14V~1.32V | |
| EEPROM | - | |
| Program Storage Size | 256KB | |
| CPU Core | Others | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 100MHz | |
| Oscillator Type | Built-in | |
| Number of I/O | 40 |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 90 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The Piccolo™ TMS320F28004x (F28004x) is a powerful 32-bit floating-point microcontroller unit (MCU) that lets designers incorporate crucial control peripherals, differentiated analog, and nonvolatile memory on a single device. The real-time control subsystem is based on TI’s 32-bit C28x CPU, which provides 100 MHz of signal processing performance. The C28x CPU is further boosted by the new TMU extended instruction set, which enables fast execution of algorithms with trigonometric operations commonly found in transforms and torque loop calculations; and the VCU-I extended instruction set, which reduces the latency for complex math operations commonly found in encoded applications. The CLA allows significant offloading of common tasks from the main C28x CPU. The CLA is an independent 32-bit floating-point math accelerator that executes in parallel with the CPU. Additionally, the CLA has its own dedicated memory resources and it can directly access the key peripherals that are required in a typical control system. Support of a subset of ANSI C is standard, as are key features like hardware breakpoints and hardware task-switching. The F28004x supports up to 256KB (128KW) of flash memory divided into two 128KB (64KW) banks, which enables programming and execution in parallel. Up to 100KB (50KW) of on-chip SRAM is also available in blocks of 4KB (2KW) and 16KB (8KW) for efficient system partitioning. Flash ECC, SRAM ECC/parity, and dual-zone security are also supported. High-performance analog blocks are integrated on the F28004x MCU to further enable system consolidation. Three separate 12-bit ADCs provide precise and efficient management of multiple analog signals, which ultimately boosts system throughput. Seven PGAs on the analog front end enable on-chip voltage scaling before conversion. Seven analog comparator modules provide continuous monitoring of input voltage levels for trip conditions. The TMS320C2000™ devices contain industry-leading control peripherals with frequency-independent ePWM/HRPWM and eCAP allow for a best-in-class level of control to the system. The built-in 4-channel SDFM allows for seamless integration of an oversampling sigma-delta modulator.
Features
- TMS320C28x 32-Bit CPU – 100 MHz – IEEE 754 Single-Precision Floating-Point Unit (FPU) – Trigonometric Math Unit (TMU) – 3× -Cycle to 4× -Cycle Improvement for Common Trigonometric Functions Versus Software Libraries – 13-Cycle Park Transform – Viterbi/Complex Math Unit (VCU-I) – Ten Hardware Breakpoints
- Programmable Control Law Accelerator (CLA) – 100 MHz – IEEE 754 Single-Precision Floating-Point Instructions – Executes Code Independently of Main CPU
- On-Chip Memory – 256KB (128KW) of Flash (ECC-Protected) Across Two Independent Banks – 100KB (50KW) of RAM (ECC-Protected or Parity-Protected) – Dual-Zone Security Supporting Third-Party Development – Unique Identification Number
- Clock and System Control – Two Internal Zero-Pin 10-MHz Oscillators – On-Chip Crystal Oscillator and External Clock Input – Windowed Watchdog Timer Module – Missing Clock Detection Circuitry
- 1.2-V Core, 3.3-V I/O Design – Internal VREG or DC-DC for 1.2-V Generation Allows for Single-Supply Designs – Brownout Reset (BOR) Circuit
- System Peripherals – 6-Channel Direct Memory Access (DMA) Controller – 40 Individually Programmable Multiplexed General-Purpose Input/Output (GPIO) Pins – 21 Digital Inputs on Analog Pins – Enhanced Peripheral Interrupt Expansion (ePIE) Module Multiple Low-Power Mode (LPM) Support With External Wakeup – Embedded Real-Time Analysis and Diagnostic (ERAD) Communications Peripherals – One Power Management Bus (PMBus) Interface – One Inter-Integrated Circuit (I2C) Interface (Pin-Bootable) – Two Controller Area Network (CAN) Bus Ports (Pin-Bootable) Two Serial Peripheral Interface (SPI) Ports (Pin-Bootable) – Two Serial Communication Interfaces (SCIs) (Pin-Bootable) – One Local Interconnect Network (LIN) – One Fast Serial Interface (FSI) With a Transmitter and Receiver
- Analog System – Three 3.45-MSPS, 12-Bit Analog-to-Digital Converters (ADCs) – Up to 21 External Channels – Four Integrated Post-Processing Blocks (PPBs) per ADC – Seven Windowed Comparators (CMPSS) With 12-Bit Reference Digital-to-Analog Converters (DACs) – Digital Glitch Filters – Two 12-Bit Buffered DAC Outputs Seven Programmable Gain Amplifiers (PGAs) – Programmable Gain Settings: 3, 6, 12, 24 – Programmable Output Filtering
- Enhanced Control Peripherals – 16 ePWM Channels With High-Resolution Capability (150-ps Resolution) – Integrated Dead-Band Support With High Resolution – Integrated Hardware Trip Zones (TZs) – Seven Enhanced Capture (eCAP) Modules – High-Resolution Capture (HRCAP) Available on Two Modules – Two Enhanced Quadrature Encoder Pulse (eQEP) Modules With Support for CW/CCW Operation Modes – Four Sigma-Delta Filter Module (SDFM) Input Channels (Two Parallel Filters per Channel) – Standard SDFM Data Filtering – Comparator Filter for Fast Action for Overvalue or Undervalue Condition
- Configurable Logic Block (CLB) – Augments Existing Peripheral Capability – Supports Position Manager Solutions
- InstaSPIN-FOC™ – Sensorless Field-oriented Control (FOC) With FAST™ Software Encoder – Library in On-chip ROM Memory
- Package Options: – 100-Pin Low-Profile Quad Flatpack (LQFP) [PZ Suffix] – 64-Pin LQFP [PM Suffix] – 56-Pin Very Thin Quad Flatpack No-Lead (VQFN) [RSH Suffix]
- Temperature Options: – S: -40℃ to 125℃ Junction – Q: -40℃ to 125℃ Free-Air (AEC Q100 Qualification for Automotive Applications)
Applications
- Appliances
- Building Automation
- Electric Vehicle/Hybrid Electric Vehicle (EV/HEV)
- Powertrain
- Factory Automation
- Grid Infrastructure
- Industrial Transport
- Medical, Healthcare, and Fitness
- Motor Drives
- Power Delivery
- Telecom Infrastructure
- Test and Measurement
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 7.0293 | $ 7.03 |
| 10+ | $ 6.0995 | $ 61.00 |
| 30+ | $ 5.5316 | $ 165.95 |
| 100+ | $ 5.0562 | $ 505.62 |
Standard Packaging90/Full Tray | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | TI | |
| Packaging | LQFP-100(14x14) | |
| DAC (Bit) | 12bit | |
| ADC (Bit) | 12bit | |
| Operating Temperature | -40℃~+125℃@(TJ) | |
| Program Memory Type | FLASH | |
| Voltage - Supply | 1.14V~1.32V | |
| EEPROM | - | |
| Program Storage Size | 256KB | |
| CPU Core | Others | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 100MHz | |
| Oscillator Type | Built-in | |
| Number of I/O | 40 |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 90 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The Piccolo™ TMS320F28004x (F28004x) is a powerful 32-bit floating-point microcontroller unit (MCU) that lets designers incorporate crucial control peripherals, differentiated analog, and nonvolatile memory on a single device. The real-time control subsystem is based on TI’s 32-bit C28x CPU, which provides 100 MHz of signal processing performance. The C28x CPU is further boosted by the new TMU extended instruction set, which enables fast execution of algorithms with trigonometric operations commonly found in transforms and torque loop calculations; and the VCU-I extended instruction set, which reduces the latency for complex math operations commonly found in encoded applications. The CLA allows significant offloading of common tasks from the main C28x CPU. The CLA is an independent 32-bit floating-point math accelerator that executes in parallel with the CPU. Additionally, the CLA has its own dedicated memory resources and it can directly access the key peripherals that are required in a typical control system. Support of a subset of ANSI C is standard, as are key features like hardware breakpoints and hardware task-switching. The F28004x supports up to 256KB (128KW) of flash memory divided into two 128KB (64KW) banks, which enables programming and execution in parallel. Up to 100KB (50KW) of on-chip SRAM is also available in blocks of 4KB (2KW) and 16KB (8KW) for efficient system partitioning. Flash ECC, SRAM ECC/parity, and dual-zone security are also supported. High-performance analog blocks are integrated on the F28004x MCU to further enable system consolidation. Three separate 12-bit ADCs provide precise and efficient management of multiple analog signals, which ultimately boosts system throughput. Seven PGAs on the analog front end enable on-chip voltage scaling before conversion. Seven analog comparator modules provide continuous monitoring of input voltage levels for trip conditions. The TMS320C2000™ devices contain industry-leading control peripherals with frequency-independent ePWM/HRPWM and eCAP allow for a best-in-class level of control to the system. The built-in 4-channel SDFM allows for seamless integration of an oversampling sigma-delta modulator.
Features
- TMS320C28x 32-Bit CPU – 100 MHz – IEEE 754 Single-Precision Floating-Point Unit (FPU) – Trigonometric Math Unit (TMU) – 3× -Cycle to 4× -Cycle Improvement for Common Trigonometric Functions Versus Software Libraries – 13-Cycle Park Transform – Viterbi/Complex Math Unit (VCU-I) – Ten Hardware Breakpoints
- Programmable Control Law Accelerator (CLA) – 100 MHz – IEEE 754 Single-Precision Floating-Point Instructions – Executes Code Independently of Main CPU
- On-Chip Memory – 256KB (128KW) of Flash (ECC-Protected) Across Two Independent Banks – 100KB (50KW) of RAM (ECC-Protected or Parity-Protected) – Dual-Zone Security Supporting Third-Party Development – Unique Identification Number
- Clock and System Control – Two Internal Zero-Pin 10-MHz Oscillators – On-Chip Crystal Oscillator and External Clock Input – Windowed Watchdog Timer Module – Missing Clock Detection Circuitry
- 1.2-V Core, 3.3-V I/O Design – Internal VREG or DC-DC for 1.2-V Generation Allows for Single-Supply Designs – Brownout Reset (BOR) Circuit
- System Peripherals – 6-Channel Direct Memory Access (DMA) Controller – 40 Individually Programmable Multiplexed General-Purpose Input/Output (GPIO) Pins – 21 Digital Inputs on Analog Pins – Enhanced Peripheral Interrupt Expansion (ePIE) Module Multiple Low-Power Mode (LPM) Support With External Wakeup – Embedded Real-Time Analysis and Diagnostic (ERAD) Communications Peripherals – One Power Management Bus (PMBus) Interface – One Inter-Integrated Circuit (I2C) Interface (Pin-Bootable) – Two Controller Area Network (CAN) Bus Ports (Pin-Bootable) Two Serial Peripheral Interface (SPI) Ports (Pin-Bootable) – Two Serial Communication Interfaces (SCIs) (Pin-Bootable) – One Local Interconnect Network (LIN) – One Fast Serial Interface (FSI) With a Transmitter and Receiver
- Analog System – Three 3.45-MSPS, 12-Bit Analog-to-Digital Converters (ADCs) – Up to 21 External Channels – Four Integrated Post-Processing Blocks (PPBs) per ADC – Seven Windowed Comparators (CMPSS) With 12-Bit Reference Digital-to-Analog Converters (DACs) – Digital Glitch Filters – Two 12-Bit Buffered DAC Outputs Seven Programmable Gain Amplifiers (PGAs) – Programmable Gain Settings: 3, 6, 12, 24 – Programmable Output Filtering
- Enhanced Control Peripherals – 16 ePWM Channels With High-Resolution Capability (150-ps Resolution) – Integrated Dead-Band Support With High Resolution – Integrated Hardware Trip Zones (TZs) – Seven Enhanced Capture (eCAP) Modules – High-Resolution Capture (HRCAP) Available on Two Modules – Two Enhanced Quadrature Encoder Pulse (eQEP) Modules With Support for CW/CCW Operation Modes – Four Sigma-Delta Filter Module (SDFM) Input Channels (Two Parallel Filters per Channel) – Standard SDFM Data Filtering – Comparator Filter for Fast Action for Overvalue or Undervalue Condition
- Configurable Logic Block (CLB) – Augments Existing Peripheral Capability – Supports Position Manager Solutions
- InstaSPIN-FOC™ – Sensorless Field-oriented Control (FOC) With FAST™ Software Encoder – Library in On-chip ROM Memory
- Package Options: – 100-Pin Low-Profile Quad Flatpack (LQFP) [PZ Suffix] – 64-Pin LQFP [PM Suffix] – 56-Pin Very Thin Quad Flatpack No-Lead (VQFN) [RSH Suffix]
- Temperature Options: – S: -40℃ to 125℃ Junction – Q: -40℃ to 125℃ Free-Air (AEC Q100 Qualification for Automotive Applications)
Applications
- Appliances
- Building Automation
- Electric Vehicle/Hybrid Electric Vehicle (EV/HEV)
- Powertrain
- Factory Automation
- Grid Infrastructure
- Industrial Transport
- Medical, Healthcare, and Fitness
- Motor Drives
- Power Delivery
- Telecom Infrastructure
- Test and Measurement
C194119 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |



