TI TC341-40

Texas Instruments' TC341 sensor is a high-performance frame-transfer CCD image sensor designed for monochrome video and computer camera applications. The device is intended to replace 2/3-inch camera tubes in applications where size, reliability, and cost are critical.

The TC341 sensor's image sensing area is configured as 488 rows with 780 elements per row. Each row provides 26 elements for dark reference. The sensor's anti-blooming protection is based on an advanced lateral overflow drain (ALOD). Anti-blooming is activated by applying an appropriate DC bias to the anti-blooming drain pin. This type of anti-blooming protection also enables clearing of all charge from the image area, achieved by applying a 10V pulse with a minimum duration of 1 microsecond to the overflow drain pin.

The sensor is designed to operate in both interlaced and progressive scan modes. Interlaced mode can be implemented in two ways: by skipping odd or even rows in the corresponding image field, or through appropriate line summation. Line summation provides higher sensitivity since all collected charge is utilized. Line skipping offers slightly higher vertical resolution but lower sensitivity. Progressive scan mode sacrifices neither sensitivity nor resolution.

A standard gated floating diffusion charge detection node converts charge to signal voltage. To improve accuracy and stability, the node is reset to an on-chip automatic potential-tracking voltage reference. The reset gate has a separate external pin, allowing pixel summation by skipping the detection node reset pulse. A low-noise, two-stage source-follower amplifier buffers the output and provides high output drive capability. The TC341 sensor is fabricated using Texas Instruments' proprietary Virtual Phase technology, which gives the device high blue-light response, low dark current, high photoresponse uniformity, and single-phase clocking.

The TC241 sensor operates over a temperature range of -10°C to 45°C.

The TC341 sensor consists of four basic functional blocks: image sensing area, image storage area, serial register, and charge detection amplifier. The location of each block is identified in the functional block diagram.

When light enters the silicon of the image sensing area, electrons are generated and collected in the pixel potential wells. Applying an appropriate DC bias to the anti-blooming drain provides anti-blooming protection. Charge exceeding the specified level determined by the ODB bias is drained from the pixel. If all previously accumulated charge must be removed from the potential wells, a short positive pulse must be applied to the drain. This marks the beginning of a new integration cycle. After the integration cycle is complete, charge is rapidly transferred to the storage area to await readout. Rows can be read out sequentially for progressive scan, or two rows can be summed in the serial register for pseudo-interlaced scan. True interlaced scanning is achieved by skipping odd or even rows based on the readout field and dumping unwanted charge into a clear drain located adjacent to the serial register.

The 26 columns on the left edge of the image sensing area are shielded from incident light. These pixels provide dark reference for downstream video processing circuits to restore the video black level. Four additional dark lines are added between the image sensing area and the image storage area for isolation.

The advanced overflow drain structure is shared by two adjacent pixels in each row. Varying the DC bias of the anti-blooming drain controls the anti-blooming protection level, with a trade-off against well capacity. Applying a pulse to the drain (approximately 10V above the nominal level, with a duration of at least 1 microsecond) removes all charge from the pixels. This feature allows precise frame-by-frame control of integration time. The single-pulse clear function also reduces smear by eliminating charge accumulated in pixels prior to the start of the integration cycle (one-sided smear). It is recommended to apply a -1V negative pulse to the anti-blooming drain during parallel transfer. This pulse prevents undesirable artifacts caused by on-chip crosstalk between the image area gate clock lines and their complements.

• High-resolution solid-state image sensor for monochrome video and computer applications
• 11mm image area diagonal, optically compatible with 2/3-inch vidicon
• Image sensing area with 754 (horizontal) × 484 (vertical) active elements
• Lateral overflow drain antiblooming
• Electronic exposure control
• Interlaced or progressive scan readout
• Line summation and pixel summation modes
• Low dark current
• Dynamic range greater than 64dB
• High sensitivity
• High blue light response, including deep UV
• Single-phase clock
• Solid-state reliability — no image burn-in, image lag, geometric distortion, image retention, or microphonics