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Artinchip D213ECV product image
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Artinchip D213ECVRoHS

Manufacturer
ArtinchipAsian Brands
MPN
D213ECV
LCSC Part #
C19268972
Packaging
QFN-128(12.3x12.3mm)
Customer #
Key Attributes
64-bit RISC-V
Datasheetpdf iconArtinchip D213ECV
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QtyUnit Price(Reference Only)Total Amount
1+$ 10.1306$ 10.13
10+$ 8.6433$ 86.43
30+$ 7.7351$ 232.05
100+$ 6.9753$ 697.53
Standard Packaging152/Full Tray
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Embedded/Microcontrollers
ManufacturerArtinchip
PackagingQFN-128(12.3x12.3mm)
ADC (Bit)12bit
Voltage - Supply3.3V
CPU CoreOthers
CPU Maximum Speed600MHz
Number of I/O100

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging152
Sales UnitPiece

Introduction

AI Translation

The D211 series is a high-performance full HD display and intelligent control SOC, featuring a domestically developed 64-bit high-computing-power RISC-V core, an integrated 16-bit DDR controller, and a rich set of interconnect peripheral interfaces. Equipped with a 2D image acceleration engine and H.264 decoding engine, it supports a wide range of interactive design scenarios and multimedia interactive experiences. Built to high reliability, high security, and high openness design standards, it is well-suited for broad industrial applications.

Features

AI Translation
  • RV64 instruction architecture
  • T-Head C906 single core, RV64IMAFDC instruction architecture, 600MHz @ 1.2V
  • L1 instruction cache 32KB, data cache 32KB
  • Single-precision/double-precision FPU
  • Sv39 memory management mode, PMP security protection
  • In-core interrupt CLINT and interrupt controller PLIC
  • Sequential boot scan: SD Card -> SPI NAND -> SPI NOR -> eMMC; boot order configurable via EFUSE programming
  • USB programming mode accessible via UBOOT pin
  • Digital signature secure boot support
  • CE implements AES/TDES/RSA encryption/decryption algorithms and SHA/HMAC verification algorithms
  • SPI_ENC enables online decryption for SPI NAND/SPI NOR
  • SID built-in eFuse 2048bit, with 512bit available for custom use
  • Built-in 256bit TRNG generator
  • BROM 32KB
  • SRAM 96KB
  • DRAM SiP 16bit KGD, two options: DDR2 512Mb, max frequency 528MHz; DDR3 1Gb, max frequency 672MHz
  • DRAM spread spectrum support
  • QSPI supports SPI NAND Flash / SPI NOR Flash
  • Single/dual/quad channel support
  • IO max rate SDR 100MHz
  • No Flash capacity restriction
  • eMMC5.0/SD3.01/SDIO3.0, 3 sets total
  • eMMC 8-wire/4-wire, supports SDR25/SDR50/DDR50 modes
  • IO max rate DDR 50MHz, 3.3V IO voltage only
  • DE display engine: 1 UI layer, 1 VI layer, max performance 1080P60
  • VI layer supports 1/31.999x~32x scaling
  • Integrated error diffusion Dither algorithm
  • GE graphics engine: max input/output image size 4096x4096
  • Horizontal and vertical flip, 90/180/270° rotation support
  • RGB format supports arbitrary angle rotation and scan order
  • Scaling 1/16x~16x, 6x4 taps 16 phases filter
  • Command queue support
  • VE video codec: H.264/AVC decoder, max performance 1080P30
  • MJPEG baseline decoder
  • PNG decoder
  • Parallel RGB 24bit, IO rate up to 200MHz, max performance 1080P60
  • Dual-link LVDS, interface rate up to 700MHz, max performance 1080P60
  • MIPI DSI 4 LANE, interface rate up to 1GHz, max performance 1080P60
  • SRGB/I8080/QSPI display interface support, IO rate up to 200MHz
  • DVP 8bit input, IO rate up to 150MHz, max performance 1080P30
  • All display output interfaces support spread spectrum
  • Integrated 1-channel Audio ADC, SNR > 90dB
  • 2-channel DMIC interface input
  • 2× I2S, both support input/output, TDM mode support
  • Left/right channel digital PWM output (SPK)
  • 2× USB: USB0 configurable as DEVICE/HOST, USB1 as HOST
  • 2× GMAC, supports 100M RMII/1000M RGMII, IEEE1588 protocol support
  • 3× SPI, supports 3-wire/4-wire interface
  • 8× UART, compatible with industry-standard 16550, baud rate accuracy <2%
  • 4× TWI, supports 7-bit and 10-bit addressing, max rate 400Kb/s
  • 2× CAN, supports CAN2.0A and CAN2.0B, programmable communication rate up to 1Mbps
  • 1× CIR, supports IR input and IR output
  • 1× PBUS, for read/write access to external device address space
  • 6 GPIO groups, 100 IOs total, each IO independently configurable: no pull / pull-up 33KΩ / pull-down 33KΩ
  • Output drive strength: 8 adjustable levels
  • Secondary debounce and interrupt support
  • GTC general-purpose timer: 52-bit timer providing system heartbeat clock
  • Timing period greater than 35
  • Configurable to pause or continue timing in debug mode