XBLW CD4060BDTR(XBLW)

CD4060 is a 14-stage ripple-carry binary counter/divider and oscillator with three oscillator terminals (RS, REXT and CEXT), ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset input (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator maybe replaced by an external clock signal at input Rs. The counter advances on the negative-going transition of RS. A HIGH level on MR resets the counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of Other input conditions. It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS (usually round). Unused inputs must be connected to VDD, VSS, or another input.

• Wide supply voltage range from 3V to 15V
• Tolerant of slow clock rise and fall times
• Fully static operation
• 5V, 10V, and 15V parametric ratings
• Standardized symmetrical output characteristics
• Inputs and outputs are protected against electrostatic effects
• Specified from -40°C to +125°C
• Packaging information: DIP16/SOP16/TSSOP16

• Control counters
• Timers
• Frequency dividers
• Time-delay circuits