XBLW CD4094BE(XBLW)
| Manufacturer | XBLWAsian Brands |
| MPN | CD4094BE(XBLW) |
| LCSC Part # | C18723491 |
| Packaging | DIP-16 |
| Customer # | |
| Key Attributes | 8-stage Shift-and-store Bus Register |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Shift Registers | |
| Manufacturer | XBLW | |
| Packaging | DIP-16 | |
| Operating temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~15V | |
| Output Type | Tri-State | |
| Series | CD40 | |
| Number of Elements | 1 | |
| Features | Output enable | |
| Function | Serial-to-Parallel |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 25 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The CD4094 is an 8-stage serial shift register. It has a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs QPO to QP7. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive-going clock transitions. The data in each shift register stage is transferred to the storage register when the strobe (STR) input is HIGH. Data in the storage register appears at the outputs whenever the output enable (OE) signal is HIGH. Two serial outputs (QS1 and QS2) are available for cascading a number of CD4094 devices. Serial data is available at Qs1 on positive-going clock edges to allow high-speed operation in cascaded systems with a fast clock rise time. The same serial data is available at Qs2 on the next negative going clock edge. This is used for cascading CD4094 devices when the clock has a slow rise time. It operates over a recommended VDD power supply range of 3V to 15V referenced to Vss (usually ground). Unused inputs must be connected to VDD, ΔVS, or another input.
Features
- Wide supply voltage range from 3V to 15V
- Fully static operation
- 5V, 10V, and 15V parametric ratings
- Standardized symmetrical oSOPutput characteristics
- Specified from -40℃ to +125℃
- Packaging information: DIP16/SOP16/TSSO16
Applications
- Serial-to-parallel data conversion
- Remote control holding register
- Dual-rank shift, hold, and bus applications
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.1622$ 0.1460 | $ 0.73 |
| 50+ | $ 0.1272$ 0.1145 | $ 5.73 |
| 150+ | $ 0.1122$ 0.1010 | $ 15.15 |
| 500+ | $ 0.0934$ 0.0841 | $ 42.05 |
| 2,000+ | $ 0.0851$ 0.0766 | $ 153.20 |
| 5,000+ | $ 0.0801$ 0.0721 | $ 360.50 |
Standard Packaging25/Full Tube | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Shift Registers | |
| Manufacturer | XBLW | |
| Packaging | DIP-16 | |
| Operating temperature | -40℃~+85℃ | |
| Voltage - Supply | 3V~15V | |
| Output Type | Tri-State | |
| Series | CD40 | |
| Number of Elements | 1 | |
| Features | Output enable | |
| Function | Serial-to-Parallel |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 25 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The CD4094 is an 8-stage serial shift register. It has a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs QPO to QP7. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive-going clock transitions. The data in each shift register stage is transferred to the storage register when the strobe (STR) input is HIGH. Data in the storage register appears at the outputs whenever the output enable (OE) signal is HIGH. Two serial outputs (QS1 and QS2) are available for cascading a number of CD4094 devices. Serial data is available at Qs1 on positive-going clock edges to allow high-speed operation in cascaded systems with a fast clock rise time. The same serial data is available at Qs2 on the next negative going clock edge. This is used for cascading CD4094 devices when the clock has a slow rise time. It operates over a recommended VDD power supply range of 3V to 15V referenced to Vss (usually ground). Unused inputs must be connected to VDD, ΔVS, or another input.
Features
- Wide supply voltage range from 3V to 15V
- Fully static operation
- 5V, 10V, and 15V parametric ratings
- Standardized symmetrical oSOPutput characteristics
- Specified from -40℃ to +125℃
- Packaging information: DIP16/SOP16/TSSO16
Applications
- Serial-to-parallel data conversion
- Remote control holding register
- Dual-rank shift, hold, and bus applications
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



