TI CDCE6214TWRGERQ1

The CDCE6214-Q1 is a four-channel, ultra-low-power, mid-jitter clock generator suitable for automotive applications. It can generate five independent clock outputs that can be selected among various driver modes. The input source can be a single-ended or differential input clock source, or a crystal oscillator. The CDCE6214-Q1 features a fractional-N PLL that can synthesize uncorrelated fundamental frequencies at any input frequency. The CDCE6214-Q1 can be configured via the I2C interface. Without a serial interface, the GPIO pins can be used for unique product configuration in pin mode. The on-chip EEPROM can be used to change the configuration, and the configuration can be pre-selected via pins. This device provides frequency margining options and glitch-free operation features to support system design verification testing (DVT) and Ethernet Audio/Video Bridging (eAVB). Fine frequency margining can be used on any output channel by switching the fractional feedback divider to DCO mode. The internal power regulation function provides excellent power supply ripple rejection (PSRR), thereby reducing the cost and complexity of the power supply network. The analog and digital core blocks operate with a 1.8V, 2.5V, or 3.3V ±5% power supply, and the output blocks operate with a 1.8V, 2.5V, or 3.3V ±5% power supply. The CDCE6214-Q1 comes in a small form factor package, has ultra-low power consumption, and can implement a high-performance clock tree based on a single reference. The factory and user-programmable EEPROM features make the CDCE6214-Q1 a low-power, easy-to-use, and instant-start clock device.

• AEC-Q100 qualified for automotive applications – Temperature Grade 2: -40°C to +105°C
• Functional safety documentation available to support functional safety system design
• High-performance, low-power fractional-N PLL configurable via RMS jitter and spurious (12kHz – 20MHz, Fout >100MHz):
  • Integer mode: differential output typical 350fs, max 600fs; LVCMOS output typical 1.05ps, max 1.5ps
  • Fractional mode: differential output typical 1.7ps, max 2.1ps; LVCMOS output typical 2.0ps, max 4.0ps
• Supports PCIe Gen1/2/3/4 with SSC and Gen1/2/3/4/5 without SSC
• Internal VCO frequency range: 2.335GHz to 2.625GHz
• Typical power consumption: 65mA for 4 output channels, 23mA for single output channel
• Universal clock input, two reference inputs for redundancy support – differential AC-coupled or LVCMOS: 10MHz to 200MHz; crystal: 10MHz to 50MHz
• Flexible output clock distribution:
  • 4-channel divider: up to 5 unique output frequencies, ranging from 24kHz to 328.125MHz
  • OUT0 – OUT4 pins with LVDS-like, LP-HCSL, or LVCMOS outputs
• Glitchless output divider switching and output channel synchronization
• Independent output enable via GPIO and registers
• Frequency margin option, DCO mode: frequency increment/decrement in steps of 10ppb or smaller
• Fully integrated configurable loop bandwidth: 100kHz to 1.6MHz
• Configurable GPIO and flexible configuration options – I²C-compatible interface: frequency up to 400kHz
• Integrated EEPROM with two pages and external selection pin, field-programmable
• Supports 100Ω systems
• Low EMI
• Compact footprint: 24-pin VQFN (4mm×4mm)

• PCIe Gen 1 to 5 clocks
• ADAS - Sensor Fusion
• Infotainment & Instrument Cluster - Automotive Head Unit - eAVB
• Data Center & Enterprise Computing, PC & Notebook
• Enterprise Machines - Multi-Function Printers
• Test & Measurement, Handheld Devices