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TI UCC21222QDRQ1
| Manufacturer | |
| MPN | UCC21222QDRQ1 |
| LCSC Part # | C1848357 |
| Packaging | SOIC-16 |
| Customer # | |
| Key Attributes | Isolated dual-channel gate driver |
| Datasheet |  TI UCC21222QDRQ1 |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Power Management (PMIC)/Gate Drivers | |
| Manufacturer | TI | |
| Packaging | SOIC-16 | |
| Input Logic Level - Low | 0.8V~1V | |
| Low Level Delay Time | 45ns | |
| High Level Delay Time | 45ns | |
| number of channels | 2 | |
| Quiescent Current | 2mA | |
| Input Logic Level - High | 2V~2.3V | |
| Operating Temperature | -40℃~+150℃@(Tj) | |
| CMTI(kV/us) | 125kV/us | |
| Driven Configuration | Low Side;High Side;Half-Bridge | |
| Current - Output Low(IOL) | 6A | |
| Rise Time | 8ns | |
| Fall Time | 8ns | |
| Features | Dead-time control | |
| Current - Output High(IOH) | 4A | |
| Load Type | IGBT;MOSFET | |
| Voltage - Supply (Driver) | 9.2V~25V | |
| Voltage - Supply (Input) | 3V~5.5V |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The UCC21222-Q1 device is an isolated dual-channel gate driver with programmable dead time and a wide temperature range. The device exhibits consistent performance and stability under extreme temperature conditions. The device uses a 4A peak source current and a 6A peak sink current to drive power MOSFETs, IGBTs, and GaN transistors. The UCC21222-Q1 device can be configured as two low-side drivers, two high-side drivers, or one half-bridge driver. The 5ns delay matching performance of the device allows two outputs to be paralleled, doubling the drive strength under heavy load conditions without the risk of internal breakdown. The input side is isolated from the two output drivers by a 3.0kV RMS isolation barrier, with a minimum common-mode transient immunity (CMTI) of 100V/ns. The dead time, which can be programmed via a resistor, allows you to adjust the system-limited dead time, thereby improving efficiency and preventing output overlap. Other protection features include: simultaneous shutdown of both outputs through the disable function when DIS is set high; an integrated anti-spike filter to suppress input transients shorter than 5ns; and 200ns negative voltage handling of spikes up to -2V on the input and output pins. All power supplies have UVLO protection.
Features
- AEC Q100 qualified with the following characteristics:
- Device temperature grade 1
- Device HBM ESD classification level H2
- Device CDM ESD classification level C6
- Resistor-programmable dead time
- Versatile: dual low-side, dual high-side, or half-bridge driver
- 4A peak source, 6A peak sink output current
- 3V to 5.5V input VCCI range
- Up to 18V VDD output drive supply
- 8V VDD UVLO
- Switching parameters:
- 28ns typical propagation delay
- 10ns minimum pulse width
- 5ns maximum delay matching
- 5.5ns maximum pulse width distortion
- TTL and CMOS compatible inputs
- Integrated spike filter
- I/O withstands –2V for 200ns
- CMTI greater than 100V/ns
- Isolation barrier lifetime greater than 40 years
- Surge immunity up to 7800V PK
- Narrow-body SOIC-16 (D) package
- Safety-related certifications (planned):
- 4242V PK isolation per DIN V VDE V 0884-11:2017-01 and DIN EN 61010-1
- 3000V RMS isolation for 1 minute per UL 1577
- CSA certified to IEC 60950-1, IEC 62368-1, and IEC 61010-1 end-equipment standards
- GB4943.1-2011 CQC certified
Applications
- HEV and EV battery chargers
- Isolated converters in AC/DC and DC/DC power supplies
- Motor drivers and inverters
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 2.4083 | $ 2.41 |
| 10+ | $ 2.0509 | $ 20.51 |
| 30+ | $ 1.784 | $ 53.52 |
| 100+ | $ 1.556 | $ 155.60 |
| 500+ | $ 1.4508 | $ 725.40 |
| 1,000+ | $ 1.4072 | $ 1407.20 |
Standard Packaging2500/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Power Management (PMIC)/Gate Drivers | |
| Manufacturer | TI | |
| Packaging | SOIC-16 | |
| Input Logic Level - Low | 0.8V~1V | |
| Low Level Delay Time | 45ns | |
| High Level Delay Time | 45ns | |
| number of channels | 2 | |
| Quiescent Current | 2mA | |
| Input Logic Level - High | 2V~2.3V | |
| Operating Temperature | -40℃~+150℃@(Tj) | |
| CMTI(kV/us) | 125kV/us | |
| Driven Configuration | Low Side;High Side;Half-Bridge | |
| Current - Output Low(IOL) | 6A | |
| Rise Time | 8ns | |
| Fall Time | 8ns | |
| Features | Dead-time control | |
| Current - Output High(IOH) | 4A | |
| Load Type | IGBT;MOSFET | |
| Voltage - Supply (Driver) | 9.2V~25V | |
| Voltage - Supply (Input) | 3V~5.5V |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The UCC21222-Q1 device is an isolated dual-channel gate driver with programmable dead time and a wide temperature range. The device exhibits consistent performance and stability under extreme temperature conditions. The device uses a 4A peak source current and a 6A peak sink current to drive power MOSFETs, IGBTs, and GaN transistors. The UCC21222-Q1 device can be configured as two low-side drivers, two high-side drivers, or one half-bridge driver. The 5ns delay matching performance of the device allows two outputs to be paralleled, doubling the drive strength under heavy load conditions without the risk of internal breakdown. The input side is isolated from the two output drivers by a 3.0kV RMS isolation barrier, with a minimum common-mode transient immunity (CMTI) of 100V/ns. The dead time, which can be programmed via a resistor, allows you to adjust the system-limited dead time, thereby improving efficiency and preventing output overlap. Other protection features include: simultaneous shutdown of both outputs through the disable function when DIS is set high; an integrated anti-spike filter to suppress input transients shorter than 5ns; and 200ns negative voltage handling of spikes up to -2V on the input and output pins. All power supplies have UVLO protection.
Features
- AEC Q100 qualified with the following characteristics:
- Device temperature grade 1
- Device HBM ESD classification level H2
- Device CDM ESD classification level C6
- Resistor-programmable dead time
- Versatile: dual low-side, dual high-side, or half-bridge driver
- 4A peak source, 6A peak sink output current
- 3V to 5.5V input VCCI range
- Up to 18V VDD output drive supply
- 8V VDD UVLO
- Switching parameters:
- 28ns typical propagation delay
- 10ns minimum pulse width
- 5ns maximum delay matching
- 5.5ns maximum pulse width distortion
- TTL and CMOS compatible inputs
- Integrated spike filter
- I/O withstands –2V for 200ns
- CMTI greater than 100V/ns
- Isolation barrier lifetime greater than 40 years
- Surge immunity up to 7800V PK
- Narrow-body SOIC-16 (D) package
- Safety-related certifications (planned):
- 4242V PK isolation per DIN V VDE V 0884-11:2017-01 and DIN EN 61010-1
- 3000V RMS isolation for 1 minute per UL 1577
- CSA certified to IEC 60950-1, IEC 62368-1, and IEC 61010-1 end-equipment standards
- GB4943.1-2011 CQC certified
Applications
- HEV and EV battery chargers
- Isolated converters in AC/DC and DC/DC power supplies
- Motor drivers and inverters
C1848357 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |