Kingston EMMC04G-W627-M06U
| Manufacturer | |
| MPN | EMMC04G-W627-M06U |
| LCSC Part # | C17321252 |
| Packaging | FBGA-153(11.5x13) |
| Customer # | |
| Key Attributes | 4GB MLC eMMC 5.0 FBGA-153(11.5x13) Memory (ICs) RoHS |
| Datasheet |  Kingston EMMC04G-W627-M06U |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | Kingston | |
| Packaging | FBGA-153(11.5x13) | |
| Memory Size | 4GB | |
| Operating temperature | -40℃~+85℃ | |
| Reading Speed in Sequence | 250MB/S | |
| Writing Speed in Sequence | 15MB/S | |
| Features | Built-in wear leveling function;Bad block management function;ECC error correction function;Power-down data protection function;Hardware reset function;Enhanced write protection function;Secure write protection function;Secure erase function | |
| NAND Flash Type | MLC | |
| NAND Stand-By Current | - | |
| Controller Stand-By Current | - | |
| Interface | eMMC 5.0 | |
| NAND Operating Voltage (VCCF) | 2.7V~3.6V | |
| Controller Operating Voltage (VCCQ) | 2.7V~3.6V;1.7V~1.95V |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
e•MMC™ products conform to the JEDEC e•MMC™ 5.0 standard. These devices are an ideal universal storage solution for many commercial and industrial applications. In a single integrated packaged device, e•MMC™ combines multi-level cell (MLC) NAND flash memory with an onboard e•MMC™ controller, providing an industry standard interface to the host system. The integrated e•MMC™ controller directly manages NAND flash media which relieves the host processor of these tasks, including flash media error control, wear-leveling, NAND flash management and performance optimization. Future revision to the JEDEC e•MMC™ standard will always maintain backward compatibility. The industry standard interface to the host processor ensures compatibility across future NAND flash generations as well, easing product sustainment throughout the product life cycle.
Features
- Packaged managed NAND flash memory with e•MMC™ 5.0 interface
- Backward compatible with all prior e•MMC™ specification revisions
- 153 - ball JEDEC FBGA RoHS Compliant package
- Operating voltage range:
- VCCQ = 1.8V/3.3V
- VCC = 3.3V
- Industrial Temperature -40℃ to +85℃
- Storage Temperature -55℃ to +85℃
- Compliant with e•MMC™ 5.0 JEDEC Standard Number JESD84 - B50
- Transitions to low power state after 50ms from idle state entry
- Variable clock frequencies of 0 - 200MHz
- Supports three different data bus widths: 1 bit(default), 4 bits, 8 bits
- Bus Modes:
- Single data transfer rate: up to 52MB/s (using 8 parallel data lines at 52MHz)
- Dual data rate mode (DDR - 104): up to 104MB/s @ 52MHz
- High speed, single data rate mode (HS - 200): up to 200MB/s @ 200MHz
- High speed, dual data rate mode (HS - 400): up to 400MB/s @ 200MHz
- Supports alternate boot operation mode to provide a simple boot sequence method
- Supports SLEEP/AWAKE (CMD5)
- Host initiated explicit sleep mode for power saving
- Enhanced write protection with permanent and partial protection options
- Multiple user data partition with enhanced attribute for increased reliability
- Error free memory access
- Cyclic Redundancy Code (CRC) for reliable command and data communication
- Internal error correction code (ECC) for improved data storage integrity
- Internal enhanced data management algorithm
- Data protection for sudden power failure during program operations
- Security:
- Secure bad block erase commands
- Enhanced write protection with permanent and partial protection options
- Cache barrier
- Background operation control & High Priority Interrupt (HPI)
- RPMB throughput improvement
- Secure write protection
- Pre EOL information
- Optimal size
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | Kingston | |
| Packaging | FBGA-153(11.5x13) | |
| Memory Size | 4GB | |
| Operating temperature | -40℃~+85℃ | |
| Reading Speed in Sequence | 250MB/S | |
| Writing Speed in Sequence | 15MB/S | |
| Features | Built-in wear leveling function;Bad block management function;ECC error correction function;Power-down data protection function;Hardware reset function;Enhanced write protection function;Secure write protection function;Secure erase function | |
| NAND Flash Type | MLC | |
| NAND Stand-By Current | - | |
| Controller Stand-By Current | - | |
| Interface | eMMC 5.0 | |
| NAND Operating Voltage (VCCF) | 2.7V~3.6V | |
| Controller Operating Voltage (VCCQ) | 2.7V~3.6V;1.7V~1.95V |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
e•MMC™ products conform to the JEDEC e•MMC™ 5.0 standard. These devices are an ideal universal storage solution for many commercial and industrial applications. In a single integrated packaged device, e•MMC™ combines multi-level cell (MLC) NAND flash memory with an onboard e•MMC™ controller, providing an industry standard interface to the host system. The integrated e•MMC™ controller directly manages NAND flash media which relieves the host processor of these tasks, including flash media error control, wear-leveling, NAND flash management and performance optimization. Future revision to the JEDEC e•MMC™ standard will always maintain backward compatibility. The industry standard interface to the host processor ensures compatibility across future NAND flash generations as well, easing product sustainment throughout the product life cycle.
Features
- Packaged managed NAND flash memory with e•MMC™ 5.0 interface
- Backward compatible with all prior e•MMC™ specification revisions
- 153 - ball JEDEC FBGA RoHS Compliant package
- Operating voltage range:
- VCCQ = 1.8V/3.3V
- VCC = 3.3V
- Industrial Temperature -40℃ to +85℃
- Storage Temperature -55℃ to +85℃
- Compliant with e•MMC™ 5.0 JEDEC Standard Number JESD84 - B50
- Transitions to low power state after 50ms from idle state entry
- Variable clock frequencies of 0 - 200MHz
- Supports three different data bus widths: 1 bit(default), 4 bits, 8 bits
- Bus Modes:
- Single data transfer rate: up to 52MB/s (using 8 parallel data lines at 52MHz)
- Dual data rate mode (DDR - 104): up to 104MB/s @ 52MHz
- High speed, single data rate mode (HS - 200): up to 200MB/s @ 200MHz
- High speed, dual data rate mode (HS - 400): up to 400MB/s @ 200MHz
- Supports alternate boot operation mode to provide a simple boot sequence method
- Supports SLEEP/AWAKE (CMD5)
- Host initiated explicit sleep mode for power saving
- Enhanced write protection with permanent and partial protection options
- Multiple user data partition with enhanced attribute for increased reliability
- Error free memory access
- Cyclic Redundancy Code (CRC) for reliable command and data communication
- Internal error correction code (ECC) for improved data storage integrity
- Internal enhanced data management algorithm
- Data protection for sudden power failure during program operations
- Security:
- Secure bad block erase commands
- Enhanced write protection with permanent and partial protection options
- Cache barrier
- Background operation control & High Priority Interrupt (HPI)
- RPMB throughput improvement
- Secure write protection
- Pre EOL information
- Optimal size
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |