MAXIM DS21448N
| Manufacturer | |
| MPN | DS21448N |
| LCSC Part # | C1549178 |
| Packaging | TEPBGA-144(17x17) |
| Customer # | |
| Key Attributes | 3.3V E1/T1/J1 Quad Line Interface |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Interface/Telecom | |
| Manufacturer | MAXIM | |
| Packaging | TEPBGA-144(17x17) | |
| Type | Line Interface Unit (LIU);Subscriber Line Interface (SLIC) | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Clock and data recovery;Jitter cleaning;Multi-channel integration | |
| Current - Supply | 320mA | |
| Voltage - Supply | 3.3V |
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Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 90 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
AI Translation
The DS21448 is a quad-port E1 or T1 line interface unit (LIU) for short-haul and long-haul applications. It incorporates four independent transmitters and four independent receivers in a single 144-pin PBGA or 128-pin LQFP package. The transmit drivers generate the necessary G.703 E1 waveshapes in 75Ω or 120Ω applications and the DSX-1 or CSU line build-outs of 0dB, -7.5dB, -15dB, and -22.5dB for T1 applications.
Features
AI Translation
- Four Complete E1, T1, or J1 LIUs
- Supports Long- and Short-Haul Trunks
- Internal Software-Selectable Receive-Side Termination for 75Ω/100Ω/120Ω
- 3.3V Power Supply
- 32-Bit or 128-Bit Crystal-Less Jitter Attenuator Requires Only a 2.048MHz Master Clock for E1 and T1, with the Option to Use 1.544MHz for T1
- Generates the Appropriate Line Build-Outs With and Without Return Loss for E1, and DSX-1 and CSU Line Build-Outs for T1
- AMI, HDB3, and B8ZS Encoding/Decoding
- 16.384MHz, 8.192MHz, 4.096MHz, or 2.048MHz Clock Output Synthesized to Recovered Clock
- Programmable Monitor Mode for Receiver Loopbacks and PRBS Pattern Generation/ Detection with Output for Received Errors
- Generates/Detects In-Band Loop Codes, 1 to 16 Bits, Including CSU Loop Codes
- 8-Bit Parallel or Serial Interface with Optional Hardware Mode
- Muxed and Nonmuxed Parallel Bus Supports Intel or Motorola
- Detects/Generates Blue (AIS) Alarms
- NRZ/Bipolar Interface for Tx/Rx Data I/O
- Transmit Open-Circuit Detection
- Receive Carrier Loss (RCL) Indication (G.775)
- High-Z State for TTIP and TRING
- 50mARMS Transmit Current Limiter
- JTAG Boundary Scan Test Port per IEEE 1149.1
- Meets Latest E1 and T1 Specifications Including ANSI.403-1999, ANSI T1.408, AT&T TR 62411, ITU G.703, G.704, G.706, G.736, G.775, G.823, I.431, O.151, O.161, ETSI ETS 300 166, JTG.703, JTI.431, TBR12, TBR13, and CTR4
Applications
AI Translation
- Integrated Multiservice Access Platforms
- T1/E1 Cross-Connects, Multiplexers, and Channel Banks
- Central-Office Switches and PBX Interfaces
- T1/E1 LAN/WAN Routers
- Wireless Base Stations
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| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 63.4026 | $ 63.40 |
| 200+ | $ 24.5366 | $ 4907.32 |
| 500+ | $ 23.6741 | $ 11837.05 |
| 1,000+ | $ 23.2476 | $ 23247.60 |
Standard Packaging90/Full Tray | ||
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Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

