TI CD74HCT191M

The CD54/74HC190 are asynchronously presettable BCD decade counters, whereas the CD54/74HC191 and CD54/74HCT191 are asynchronously presettable binary counters. Presetting the counter to the number on preset data inputs (A - D) is accomplished by a low asynchronous parallel load (LOAD) input. Counting occurs when LOAD is high, count enable (CTEN) is low, and the down/up (D/U) input is either high for down counting or low for up counting. The counter is decremented or incremented synchronously with the low - to - high transition of the clock. When an overflow or underflow of the counter occurs, the MAX/MIN output, which is low during counting, goes high and remains high for one clock cycle. This output can be used for look - ahead carry in high - speed cascading. The MAX/MIN output also initiates the ripple clock (RCO) output, which normally is high, goes low, and remains low for the low - level portion of the clock pulse. These counters can be cascaded using RCO. If a decade counter is preset to an illegal state or assumes an illegal state when power is applied, it returns to the normal sequence in one or two counts.

• 2 - V to 6 - V Vcc Operation ('HC190, 191)
• 4.5 - V to 5.5 - V Vcc Operation ('HCT191)
• Wide Operating Temperature Range of - 55℃ to 125℃
• Synchronous Counting and Asynchronous Loading
• Two Outputs for n - Bit Cascading
• Look - Ahead Carry for High - Speed Counting
• Balanced Propagation Delays and Transition Times
• Standard Outputs Drive Up To 15 LS - TTL Loads
• Significant Power Reduction Compared to LS - TTL Logic ICs