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onsemi MC74VHCT50ADTR2GRoHS

Manufacturer
MPN
MC74VHCT50ADTR2G
LCSC Part #
C152520
Packaging
TSSOP-14
Customer #
Key Attributes
Noninverting Buffer/CMos Logic Level Shifter with LSTTL-Compatible Inputs
Datasheetpdf icononsemi MC74VHCT50ADTR2G
In-Stock: 100
100 In stock, ships now
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QtyUnit PriceTotal Amount
5+$ 0.3474$ 1.74
50+$ 0.2757$ 13.79
150+$ 0.245$ 36.75
500+$ 0.2068$ 103.40
2,500+$ 0.1897$ 474.25
5,000+$ 0.1795$ 897.50
Standard Packaging2500/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers
Manufactureronsemi
PackagingTSSOP-14
Input type-
Voltage - Supply2V~5.5V
Output TypePush-pull
Current - Output High(IOH)8mA
Series74VHCT
Operating Temperature-55℃~+125℃
Current - Output Low(IOL)8mA
Number of Bits per Element1
Channel TypeUnidirectional
FeaturesLevel shifting;Power-off isolation
Number of Elements6
Quiescent Current2uA
Propagation Delay3.5ns@5V,50pF

Additional Information

TypeDetails
Minimum5
Multiple5
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

The MC74VHCT50A is a hex noninverting buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffered output which provides high noise immunity and stable output. The device input is compatible with TTL−type input thresholds and the output has a full 5 V CMOS level output swing. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic−level translator from 3.0 V CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high−voltage power supply. The MC74VHCT50A input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This allows the MC74VHCT50A to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when VCC = 0 V. These input and output structures help prevent device destruction caused by supply voltage − input/output voltage mismatch, battery backup, hot insertion, etc.

Features

AI Translation
  • High Speed: tpD = 3.5 ns (Typ) at VCC = 5 V
  • Low Power Dissipation: ICC = 2 μA (Max) at TA = 25°C
  • TTL−Compatible Inputs: VIL = 0.8 V ; VIH = 2.0 V
  • CMOS−Compatible Outputs: VOH > 0.8 VCC; VOL < 0.1 VCC (Load
  • Power Down Protection Provided on Inputs and Outputs
  • NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
  • These Devices are Pb −Free and are RoHS Compliant