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SILICON LABS SI5319C-C-GM product image
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SILICON LABS SI5319C-C-GMRoHS

Manufacturer
MPN
SI5319C-C-GM
LCSC Part #
C1520222
Packaging
QFN-36-EP(6x6)
Customer #
Key Attributes
QFN-36-EP(6x6) Application Specific Clock/Timing RoHS
Datasheetpdf iconSILICON LABS SI5319C-C-GM
In-Stock: 11
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QtyUnit PriceTotal Amount
1+$ 34.3996$ 34.40
30+$ 32.7037$ 981.11
Standard Packaging490/Full Tray
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Clock/Timing/Application Specific Clock/Timing
ManufacturerSILICON LABS
PackagingQFN-36-EP(6x6)
FeaturesProgrammable clock output;Alarm function

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging490
Sales UnitPiece

Introduction

AI Translation

The Si5319 is a jitter-attenuating precision M/N clock multiplier for applications requiring sub 1 ps jitter performance. The Si5319 accepts one clock input ranging from 2 kHz to 710 MHz and generates one clock output ranging from 2 kHz to 945 MHz and select frequencies to 1.4 GHz. The Si5319 can also use its crystal oscillator as a clock source for free-running clock generation. The device provides virtually any frequency translation combination across this operating range. The Si5319 input clock frequency and clock multiplication ratio are programmable through an I2C or SPI interface. The Si5319 is based on third-generation DSPLL technology, which provides any-frequency synthesis and jitter attenuation in a highly integrated PLL solution that eliminates the need for external VCXO and loop filter components. The DSPLL loop bandwidth is digitally programmable, providing jitter performance optimization at the application level. Operating from a single 1.8, 2.5, or 3.3 V supply, the Si5319 is ideal for providing clock multiplication and jitter attenuation in high performance timing applications.

Features

AI Translation
  • Generates any frequency from 2 kHz to 945 MHz and select frequencies to 1.4 GHz from an input frequency of 2 kHz to 710 MHz
  • Ultra-low jitter clock output with jitter generation as low as 0.3 ps rms (50 kHz - 80 MHz)
  • Integrated loop filter with selectable loop bandwidth (60 Hz to 8.4 kHz)
  • Meets OC-192 GR-253-CORE jitter specifications
  • Clock or crystal input with manual clock selection
  • Selectable clock output signal format (LVPECL, LVDS, CML, CMOS)
  • Support for ITU G.709 and custom OTN FEC ratios (e.g. 255/238, 255/237, 255/236)
  • Supports various frequency translations for Synchronous Ethernet
  • LOL, LOS alarm outputs
  • I2C or SPI programmable
  • On-chip voltage regulator for 1.8 V ±5%, 2.5 V ±10% or 3.3 V ±10% operation
  • Small size: 6×6 mm 36-lead QFN
  • Pb-free, ROHS compliant

Applications

AI Translation
  • 10G/40G/100G OTN line cards
  • SONET/SDH OC-48/STM-16 and OC-192/STM-64 line cards
  • GbE/10GbE, 1/2/4/8/10GFC line cards
  • ITU G.709 and custom FEC line cards
  • Synchronous Ethernet
  • Optical modules
  • Wireless basestations
  • Data converter clocking
  • DSLAM/MSANs
  • Test and measurement
  • Broadcast video
  • Discrete PLL replacement