MICROCHIP AT94K40AL-25DQU
| Manufacturer | |
| MPN | AT94K40AL-25DQU |
| LCSC Part # | C1518995 |
| Packaging | PQFP-208(28x28) |
| Customer # | |
| Key Attributes | AVR 18MHz PQFP-208(28x28) FPGAs (Field Programmable Gate Array) with Microcontrollers RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/FPGAs (Field Programmable Gate Array) with Microcontrollers | |
| Manufacturer | MICROCHIP | |
| Packaging | PQFP-208(28x28) | |
| CPU Core | AVR | |
| CPU Maximum Speed | 18MHz |
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Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 24 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Features
AI Translation
- Monolithic Field Programmable System Level Integrated Circuit (FPSLIC) – AT40K SRAM-based FPGA with Embedded High-performance RISC AVR Core, Extensive Data and Instruction SRAM and JTAG ICE
- 5,000 to 40,000 Gates of Patented SRAM-based AT40K FPGA with FreeRAM – 2 - 18.4 Kbits of Distributed Single/Dual Port FPGA User SRAM – High-performance DSP Optimized FPGA Core Cell – Dynamically Reconfigurable In-System – FPGA Configuration Access Available On-chip from AVR Microcontroller Core to Support Cache Logic Designs – Very Low Static and Dynamic Power Consumption – Ideal for Portable and Handheld Applications
- Patented AVR Enhanced RISC Architecture – 120+ Powerful Instructions – Most Single Clock Cycle Execution – High-performance Hardware Multiplier for DSP-based Systems – Approaching 1 MIPS per MHz Performance – C Code Optimized Architecture with 32x8 General-purpose Internal Registers – Low-power Idle, Power-save and Power-down Modes – 100 μA Standby and Typical 2 - 3 mA per MHz Active
- Up to 36 Kbytes of Dynamically Allocated Instruction and Data SRAM – Up to 16 Kbytes x 16 Internal 15 ns Instructions SRAM – Up to 16 Kbytes x8 Internal 15 ns Data SRAM
- JTAG (IEEE std. 1149.1 Compliant) Interface – Extensive On-chip Debug Support – Limited Boundary-scan Capabilities According to the JTAG Standard (AVR Ports)
- AVR Fixed Peripherals – Industry-standard 2-wire Serial Interface – Two Programmable Serial UARTs – Two 8-bit Timer/Counters with Separate Prescaler and PWM – One 16-bit Timer/Counter with Separate Prescaler, Compare, Capture Modes and Dual 8-, 9- or 10-bit PWM
- Support for FPGA Custom Peripherals – AVR Peripheral Control – 16 Decoded AVR Address Lines Directly Accessible to FPGA – FPGA Macro Library of Custom Peripherals
- 16 FPGA Supplied Internal Interrupts to AVR
- Up to Four External Interrupts to AVR
- 8 Global FPGA Clocks – Two FPGA Clocks Driven from AVR Logic – FPGA Global Clock Access Available from FPGA Core
- Multiple Oscillator Circuits – Programmable Watchdog Timer with On-chip Oscillator – Oscillator to AVR Internal Clock Circuit – Software-selectable Clock Frequency – Oscillator to Timer/Counter for Real-time Clock
- VCC: 3.0V - 3.6V
- 3.3V 33 MHz PCI-compliant FPGA I/O – 20 mA Sink/Source High-performance I/O Structures – All FPGA I/O Individually Programmable
- High-performance, Low-power 0.35μ CMOS Five-layer Metal Process
- State-of-the-art Integrated PC-based Software Suite including Co-verification
- 5V I/O Tolerant
Applications
AI Translation
- Video compression and decompression
- Encryption
- Convolution
- Other multimedia applications
Out of Stock
Stock Notification
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| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 42.4245 | $ 42.42 |
| 200+ | $ 16.4188 | $ 3283.76 |
| 500+ | $ 15.8415 | $ 7920.75 |
| 1,000+ | $ 15.5567 | $ 15556.70 |
Standard Packaging24/Full Tray | ||
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Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | 3A991D |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | 3A991D |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |

