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NXP SPC5602PEF0VLL6 product image
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NXP SPC5602PEF0VLL6RoHS

Manufacturer
MPN
SPC5602PEF0VLL6
LCSC Part #
C1344902
Packaging
LQFP-100(14x14)
Customer #
Key Attributes
Freescale Series 32 Bit 64MHz 79 LQFP-100(14x14) Microcontrollers RoHS
Datasheetpdf iconNXP SPC5602PEF0VLL6
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QtyUnit Price(Reference Only)Total Amount
1+$ 16.5705$ 16.57
200+$ 6.4134$ 1282.68
450+$ 6.1886$ 2784.87
900+$ 6.077$ 5469.30
Standard Packaging450/Full Tray
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Embedded/Microcontrollers
ManufacturerNXP
PackagingLQFP-100(14x14)
ADC (Bit)10bit
Operating Temperature-40℃~+105℃
Voltage - Supply3V~5.5V
Program Memory TypeFLASH
EEPROM4KB
Program Storage Size256KB
CPU CoreFreescale Series
Core Size32 Bit
CPU Maximum Speed64MHz
Oscillator TypeBuilt-in
Number of I/O79

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging450
Sales UnitPiece

Introduction

AI Translation

Up to 64 MHz, single issue, 32-bit CPU core complex (e200z0h) Compliant with Power Architecture embedded category Variable Length Encoding (VLE) Memory organization Up to 256 KB on-chip code flash memory with ECC and erase/program controller Optional: additional 64 (4x16) KB on-chip data flash memory with ECC for EEPROM emulation Up to 20 KB on-chip SRAM with ECC Fail-safe protection Programmable watchdog timer Non-maskable interrupt Fault collection unit Nexus Class 1 interface Interrupts and events 16-channel eDMA controller 16 priority level controller Up to 25 external interrupts PIT implements four 32-bit timers 120 interrupts are routed via INTC General purpose I/Os Individually programmable as input, output or special function 37 on 64 LQFP 64 on 100 LQFP 1 general purpose eTimer unit 6 timers each with up/down capabilities 16-bit resolution, cascadeable counters Quadrature decode with rotation direction flag Double buffer input capture and output compare Communications interfaces Up to 2 LINFlex modules (1x Master/Slave, 1x Master only) Up to 3 DSPI channels with automatic chip select generation (up to 8/4/4 chip selects) 1 FlexCAN interface (2.0B Active) with 32 message buffers 1 safety port based on FlexCAN with 32 message buffers and up to 8 Mbit/s at 64 MHz capability, usable as second CAN when not used as safety port One 10-bit analog-to-digital converter (ADC) Up to 16 input channels (16 ch on 100 LQFP and 12 ch on 64 LQFP) Conversion time <1 μs including sampling time at full precision Programmable Cross Triggering Unit (CTU) 4 analog watchdogs with interrupt capability On-chip CAN/UART bootstrap loader with Boot Assist Module (BAM) 1 FlexPWM unit 8 complementary or independent outputs with ADC synchronization signals Polarity control, reload unit Integrated configurable dead time unit and inverter fault input pins 16-bit resolution Lockable configuration Clock generation 4–40 MHz main oscillator 16 MHz internal RC oscillator Software-controlled FMPLL capable of up to 64 MHz Voltage supply 3.3 V or 5 V supply for I/Os and ADC On-chip single supply voltage regulator with external ballast transistor Operating temperature ranges: -40 to 125 ℃ or -40 to 105 ℃