TI SN74LVC2G08IDCTRQ1
| Manufacturer | |
| MPN | SN74LVC2G08IDCTRQ1 |
| LCSC Part # | C134114 |
| Packaging | MSOP-8-2.8mm |
| Customer # | |
| Key Attributes | DUAL 2-INPUT POSITIVE-AND GATE |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | TI | |
| Packaging | MSOP-8-2.8mm | |
| Features | Local shutdown mode | |
| Input Logic Level - Low | 700mV~800mV | |
| Input Logic Level - High | 1.7V~2V | |
| Operating Temperature | -40℃~+85℃ | |
| Logic Family | 74LVC Series | |
| Output Logic Level - High | 1.2V;1.9V;2.4V;3.8V | |
| Quiescent Current(Iq) | 10uA | |
| Voltage - Supply | 1.65V~5.5V | |
| Number of Channels | 2;2 | |
| Current - Output High(IOH) | 32mA | |
| Output Logic Level - Low | 450mV;300mV;400mV;550mV | |
| Propagation Delay | 3.8ns@5V,50pF | |
| Current - Output Low(IOL) | 32mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
This dual 2- input positive- AND gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC2G08- Q1 performs the Boolean function Y = A • B or Y = A + B(overline) in positive logic. This device is fully specified for partial- power- down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Features
- Qualified for Automotive Applications
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 4.7 ns at 3.3 V
- Low Power Consumption, 10-µA Max ICC
- ±24-mA Output Drive at 3.3 V
- Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25℃
- Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25℃
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 1000-V Charged-Device Model (C101)
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 0.7736 | $ 0.77 |
| 10+ | $ 0.6336 | $ 6.34 |
| 30+ | $ 0.5652 | $ 16.96 |
| 100+ | $ 0.4968 | $ 49.68 |
| 500+ | $ 0.3991 | $ 199.55 |
| 1,000+ | $ 0.3779 | $ 377.90 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | TI | |
| Packaging | MSOP-8-2.8mm | |
| Features | Local shutdown mode | |
| Input Logic Level - Low | 700mV~800mV | |
| Input Logic Level - High | 1.7V~2V | |
| Operating Temperature | -40℃~+85℃ | |
| Logic Family | 74LVC Series | |
| Output Logic Level - High | 1.2V;1.9V;2.4V;3.8V | |
| Quiescent Current(Iq) | 10uA | |
| Voltage - Supply | 1.65V~5.5V | |
| Number of Channels | 2;2 | |
| Current - Output High(IOH) | 32mA | |
| Output Logic Level - Low | 450mV;300mV;400mV;550mV | |
| Propagation Delay | 3.8ns@5V,50pF | |
| Current - Output Low(IOL) | 32mA |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
This dual 2- input positive- AND gate is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC2G08- Q1 performs the Boolean function Y = A • B or Y = A + B(overline) in positive logic. This device is fully specified for partial- power- down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Features
- Qualified for Automotive Applications
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 4.7 ns at 3.3 V
- Low Power Consumption, 10-µA Max ICC
- ±24-mA Output Drive at 3.3 V
- Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25℃
- Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25℃
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 1000-V Charged-Device Model (C101)
C134114 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



