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MAXIM DS5001FP-16N+ product image
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MAXIM DS5001FP-16N+RoHS

Manufacturer
MPN
DS5001FP-16N+
LCSC Part #
C1340100
Packaging
QFP-80(14x20)
Customer #
Key Attributes
51 Family 8 Bit 16MHz 32 QFP-80(14x20) Microcontrollers RoHS
Datasheetpdf iconMAXIM DS5001FP-16N+

Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Embedded/Microcontrollers
ManufacturerMAXIM
PackagingQFP-80(14x20)
Operating Temperature-40℃~+85℃
Program Memory TypeExternal
Voltage - Supply4.5V~5.5V
EEPROM-
CPU Core51 Family
Core Size8 Bit
CPU Maximum Speed16MHz
Oscillator TypeExternal
Number of I/O32

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging20
Sales UnitPiece

Introduction

AI Translation

The DS5001FP 128k soft microprocessor chip is an 8051-compatible microprocessor based on NV RAM technology and designed for systems that need large quantities of nonvolatile memory. It provides full compatibility with the 8051 instruction set, timers, serial port, and parallel I/O ports. By using NV RAM instead of ROM, the user can program and then reprogram the microprocessor while in-system. The application software can even change its own operation, which allows frequent software upgrades, adaptive programs, customized systems, etc. In addition, by using NV SRAM, the DS5001FP is ideal for data logging applications. It also connects easily to a Dallas real-time clock.

The DS5001FP provides the benefits of NV RAM without using I/O resources. It uses a nonmultiplexed byte-wide address and data bus for memory access. This bus performs all memory access and provides decoded chip enables for SRAM, which leaves the 32 I/O port pins free for application use. The DS5001FP uses ordinary SRAM and battery-backs the memory contents for over 10 years at room temperature with a small external battery. A DS5001FP also provides high-reliability operation in harsh environments. These features include the ability to save the operating state, power-fail reset, power-fail interrupt, and watchdog timer.

A user programs the DS5001FP through its on-chip serial bootstrap loader. The bootstrap loader supervises the loading of software into NV RAM, validates it, and then becomes transparent to the user. Software can be stored in multiple 32kB or one 128kB CMOS SRAM(s). Using its internal partitioning, the DS5001FP can divide a common RAM into user-selectable program and data segments. This partition can be selected at program loading time, but can then be modified later at any time. The microprocessor decodes memory access to the SRAM and addresses memory through its byte-wide bus. Memory portions designated code or ROM are automatically write-protected by the microprocessor. Combining program and data storage in one device saves board space and cost.

The DS5001FP offers several bank switches for access to even more memory. In addition to the primary data area of 64kB, a peripheral selector creates a second 64kB data space with four accompanying chip enables. This area can be used for memory-mapped peripherals or more data storage. The DS5001FP can also use its expanded bus on ports 0 and 2 (like an 8051) to access an additional 64kB of data space. Lastly, the DS5001FP provides one additional bank switch that changes up to 60kB of the NV RAM program space into data memory. Thus, with a small amount of logic, the DS5001 accesses up to 252kB of data memory.

Features

AI Translation
  • Accesses up to 128kB of nonvolatile SRAM
  • In-system programming through on-chip serial port
  • Can modify its own program or data memory
  • Accesses memory on a separate byte-wide bus
  • Performs CRC-16 check of NV RAM memory
  • Decodes memory and peripheral chip enables
  • Maintains all nonvolatile resources for over 10 years
  • Power-fail reset
  • Early warning power-fail interrupt
  • Watchdog timer
  • Lithium backs user SRAM for program/data storage
  • Precision bandgap reference for power monitor
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