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TI SN74ABT541BPWR
| Manufacturer | |
| MPN | SN74ABT541BPWR |
| LCSC Part # | C131956 |
| Packaging | TSSOP-20 |
| Customer # | |
| Key Attributes | OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
| Datasheet |  TI SN74ABT541BPWR |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | TI | |
| Packaging | TSSOP-20 | |
| Input type | - | |
| Voltage - Supply | 4.5V~5.5V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | 32mA | |
| Series | 74ABT | |
| Operating Temperature | -40℃~+85℃ | |
| Current - Output Low(IOL) | 64mA | |
| Number of Bits per Element | 8 | |
| Channel Type | Unidirectional | |
| Features | Power-off isolation;Output enable | |
| Number of Elements | 1 | |
| Quiescent Current | 250uA | |
| Propagation Delay | 2ns@5V,50pF |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The SN54ABT541 and SN74ABT541B octal buffers and line drivers are ideal for driving bus lines or buffering memory address registers. The devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout. The 3-state control gate is a two-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all eight outputs are in the high-impedance state. When VCC is between 0 and 2.1V the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Features
- State-of-the-Art EPiC-IIB BiCMOS Design Significantly Reduces Power Dissipation
- Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
- Typical VOLP (Output Ground Bounce) < 1V at VCC = 5V, TA = 25℃
- High-Impedance State During Power Up and Power Down
- High-Drive Outputs (-32 mA IOH, 64 mA IOL)
- Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Package, and Plastic (N) and Ceramic (J) DIPs
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 1.1521 | $ 1.15 |
| 10+ | $ 0.9574 | $ 9.57 |
| 30+ | $ 0.8503 | $ 25.51 |
| 100+ | $ 0.7286 | $ 72.86 |
| 500+ | $ 0.6248 | $ 312.40 |
| 1,000+ | $ 0.602 | $ 602.00 |
Standard Packaging2000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | TI | |
| Packaging | TSSOP-20 | |
| Input type | - | |
| Voltage - Supply | 4.5V~5.5V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | 32mA | |
| Series | 74ABT | |
| Operating Temperature | -40℃~+85℃ | |
| Current - Output Low(IOL) | 64mA | |
| Number of Bits per Element | 8 | |
| Channel Type | Unidirectional | |
| Features | Power-off isolation;Output enable | |
| Number of Elements | 1 | |
| Quiescent Current | 250uA | |
| Propagation Delay | 2ns@5V,50pF |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The SN54ABT541 and SN74ABT541B octal buffers and line drivers are ideal for driving bus lines or buffering memory address registers. The devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout. The 3-state control gate is a two-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all eight outputs are in the high-impedance state. When VCC is between 0 and 2.1V the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Features
- State-of-the-Art EPiC-IIB BiCMOS Design Significantly Reduces Power Dissipation
- Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
- Typical VOLP (Output Ground Bounce) < 1V at VCC = 5V, TA = 25℃
- High-Impedance State During Power Up and Power Down
- High-Drive Outputs (-32 mA IOH, 64 mA IOL)
- Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Package, and Plastic (N) and Ceramic (J) DIPs
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |