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TI SN74LVC2G132DCURRoHS

Manufacturer
TI
MPN
SN74LVC2G132DCUR
LCSC Part #
C130201
Packaging
VSSOP-8
Customer #
Key Attributes
Dual 2-Input NAND Gate With Schmitt-Trigger Inputs
Datasheetpdf iconTI SN74LVC2G132DCUR
In-Stock: 25,810
25,810 In stock, ships now
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QtyUnit PriceTotal Amount
5+$ 0.2571$ 1.29
50+$ 0.2032$ 10.16
150+$ 0.1801$ 27.02
500+$ 0.1514$ 75.70
3,000+$ 0.1264$ 379.20
6,000+$ 0.1187$ 712.20
Standard Packaging3000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerTI
PackagingVSSOP-8
Logic Family74LVC Series
Voltage - Supply1.65V~5.5V
Output Logic Level - Low450mV;300mV;400mV;550mV~650mV
Propagation Delay5ns@5V,50pF
FeaturesLive insertion protection;Local shutdown mode;Rear drive protection
Input Logic Level - High1.16V~3.33V
Input Logic Level - Low390mV~1.87V
Operating Temperature-40℃~+125℃
Output Logic Level - High1.2V;1.9V;2.4V;2.3V;3.8V
Quiescent Current(Iq)10uA
Number of Channels2;2
Current - Output High(IOH)32mA
Current - Output Low(IOL)32mA
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Additional Information

TypeDetails
Minimum5
Multiple5
Standard Packaging3000
Sales UnitPiece

Introduction

AI Translation

This dual 2-input NAND gate with Schmitt-trigger inputs is designed for 1.65-V to 5.5-V Vcc operation. The SN74LVC2G132 contains two inverters and performs the Boolean function Y = A·B or Y = A + B in positive logic. The device functions as two independent inverters, but because of Schmitt action, it has different input threshold levels for positive-going (VT+) and negative-going (VT-) signals. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Features

AI Translation
  • Available in Texas Instruments NanoFree™ Package
  • Supports 5-V Vcc Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 5.3 ns at 3.3 V
  • Low Power Consumption, 10-μA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) > 2V at VCC = 3.3V, TA = 25°C
  • Ioff Supports Live Insertion, Partial Power Down Mode, and Back Drive Protection
  • Support Translation Down (5V to 3.3V and 3.3V to 1.8V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)